Method for introduction of an impurity dopant in SiC, a semiconductor device formed by the method and a use of highly doped amorphous layer as a source for dopant diffusion into SiC
AssigneeABB Research Ltd.
InventorsChristopher Harris, Andrei Konstantinov, Erik Janzen
A method for introduction of an impurity dopant into a semiconductor layer of SiC comprises the step of ion implantation of the dopant in the semiconductor layer at a low temperature. The ion implantation is carried out in such a way that a doped and amorphous near-surface layer is formed, and the implantation step is followed by a step of annealing the semiconductor layer at such a high temperature that the dopant diffuses into the non-implanted sub-layer of the semiconductor layer following the near-surface layer.
Drawings
Claims12
A method for introducing an impurity dopant into a semiconductor layer of SiC, said method comprising the steps of:
a) implanting dopant ions into said semiconductor layer at a concentration limit below the amorphization limit of SiC to from a doped near-surface layer;
and then
b) implanting inert species into said semiconductor layer such that said near surface layer of said semiconductor layer becomes doped and amorphous;
and
c) annealing said semiconductor layer at such a temperature that said dopant diffuses into a non-implanted sub-layer of said semiconductor layer below said near surface layer.
#The present invention relates to a method for introduction of an impurity dopant into a semiconductor layer of SiC, comprising the step of ion implantation of the dopant in the semiconductor layer at a low temperature as well as a semiconductor device produced by carrying out such a method.
#Such ion implantation technique may be used for production of all types of semiconductor devices, such as for example different types of diodes, transistors and thyristors, and it is an attractive technique in device fabrication as it allows room temperature control of both impurity level and distribution. This technique is well developed for Si-devices, but the method successfully used for ion implantation for such devices may not be utilized for SiC-devices, which are particularly used in applications in which it is possible to benefit from the superior properties of SiC in comparison with primarily Si, namely the capability of SiC to function well under extreme conditions. SiC has a high thermal stability due to a large bandgap energy, so that devices fabricated from the material are able to operate at high temperatures, namely up to 1000 K. Furthermore, it has a high thermal conductivity, so that SiC devices may be arranged at a high density. SiC also has a more than five times higher breakdown field than Si, so that it is well suited as a material in high power devices operating under conditions where high voltages may occur in the blocking state of a device.
#Accordingly, it is highly desired to find means to control this technique of device fabrication also for SiC, so that doped high quality regions with a low defect density may be created in SiC by ion implantation.
Brief description of the drawings1 figure
#With reference to the appended drawing, below follows a specific description of a preferred embodiment of the invention cited as an example.
#FIGS. 1 and 2 illustrate schematically different steps of a method for introduction of an impurity dopant into a semiconductor layer of SiC, and thereby creating a semiconductor power device in the form of a rectifier diode according to a preferred embodiment of the invention.
Detailed description1,200 words
#FIGS. 1 and 2 illustrate the two important major steps of a large number of steps of a method according to the invention for introduction of an impurity dopant into a semiconductor layer of SiC, which here is used for producing a power diode. All the layers of this device are made of SiC, but it is within the scope of the invention that the other semiconductor layers than that into which an impurity dopant is introduced by ion implantation are of another material than SiC. A device created in this way and schematically shown in FIG. 2 has three differently doped layers, namely a first highly doped layer 1, preferably forming the substrate, of N-type conductivity for making a low resistance contact with an ohmic contact metal plate of the device not shown in FIG. 2, a second low-doped N-type conductivity thicker layer 2 arranged thereon and a third thinner P-type conductivity layer 3 arranged in, and on, the top of the second layer 2 for forming a pn-junction at the interface therewith and which is created according to the method of the present invention. In a rectifier diode having these three layers the space charge region is primarily provided by the second low-doped layer 2, which will take the main part of the voltage applied on the device in the reverse operating direction thereof, and such a device may have a breakdown voltage in the kV-range.
#The method according to the invention will now be explained while referring to FIGS. 1 and 2. The top of the SiC layer 2 is coated by a mask material 4, which has been etched to expose the SiC layer in a central region 5 thereof, where ions are to be implanted. The mask may preferably be made of AIN, which withstands the high temperatures in the annealing step of the process, but another masking material may also be used, however, that may necessitate the removal thereof before annealing.
#After the removal of the mask material, preferably by reactive ion etching (RIE), ions are implanted by acceleration thereof into this central region 5 of the SiC layer 2. The ions are preferably aluminium or boron ions. Al is preferred due to its low ionization energy, where B has the advantage of higher diffusivity and good activation behavior. The energy used for the bombardement of the central region 5 by the ions is preferably in the range of 100 KeV-300 KeV.
Application
08/436,488Filed 8 May 1995
Priority
SE 950131010 Apr 1995
Granted
22 Dec 1998
Term ended
22 Dec 2015Estimated · howhidePre-1995 term; greater of 17 years from grant or 20 years from filing when eligible. Maintenance-fee lapses, terminal disclaimers and statutory extensions have not been checked. The continuity chain may be incomplete; this is not an enforceability determination.