Method of large angle tilt implant of channel region
AssigneeAdvanced Micro Devices, Inc.
InventorJack Zezhong Peng
Life of this patent
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Abstract
A channel region formation process in field effect transistors directed toward reducing threshold voltage sensitivity to variations in gate length resulting from manufacturing techniques. A polysilicon gate is formed over the substrate and a channel region is subsequently implanted at a large angle measured from perpendicular to the substrate. Large angle implantation results in a non-uniform doping concentration in the channel region, improving threshold voltage sensitivity. Improvement can also be seen in other parameters, including source-drain current, substrate current, leakage current, magnification factor, and hot electron channel injection efficiency.
Claims14
A method of doping a semiconductor substrate, comprising the steps of:
- forming a gate over said substrate, said gate having a first edge and said gate having a length;
- forming a masking layer extending over a first part of said gate, said masking layer positioned a maximum overlay distance from said first edge of said gate such that a second part of said gate is exposed, wherein said maximum overlay distance is defined by max(OL, L.sub.g /2), where OL is a predefined overlay value, and L.sub.g is said gate length, and where max(x,y) is a function defining the maximum value of x and y;
- and
- forming a variantly doped channel region under said gate.
A method of doping a semiconductor substrate, comprising the steps of:
- growing a gate oxide layer over said substrate;
- depositing a polysilicon layer over said gate oxide layer;
- etching said polysilicon layer to form a polysilicon gate, having a gate length and having an edge;
- applying a photoresist layer over said gate and said substrate;
- aligning a mask over said photoresist layer having a pattern such that said pattern on said mask is offset from said edge by a maximum overlay distance defined by max(OL, L.sub.g /2), where OL is a predefined overlay value and L.sub.g /2 is half said gate length, and where max(x,y) is a function defining the maximum value of x and y;
- exposing said mask and said photoresist layer to ultraviolet light;
- removing a portion of said photoresist layer;
- implanting ions into said substrate under said polysilicon gate at an angle of approximately 45.degree.-60.degree. from perpendicular to said substrate;
- and rotating said substrate in a plane.
A method of doping a substrate, comprising the steps of:
- forming a polysilicon gate over said substrate, said polysilicon gate having a gate length and having an edge;
- forming a resist layer over said gate and said substrate;
- removing a first portion of said resist layer such that a second portion of said resist layer is over a first portion of said polysilicon gate, said second portion of said resist layer being positioned a maximum overlay distance from said edge of said polysilicon gate, said maximum overlay distance defined by max(OL, L.sub.g /2), where OL is a predefined overlay value and (L.sub.g /2) is half of said gate length, and where max(x,y) is a function defining the maximum value of x and y;
- and
- implanting ions into said substrate under said polysilicon gate.
Dependencies are inferred from the claim text.