Process for packaging a semiconductor die using dicing and testing

A semiconductor packaging method, comprising:

• providing a semiconductor wafer comprising a plurality of integrated circuit dice;
• providing a substrate wafer;
• thinning the semiconductor wafer by etching a backside thereof to a thickness of between about 1-14 mils;
• following thinning, mounting the semiconductor wafer to the substrate wafer by forming an adhesive layer between a backside of the semiconductor wafer and the substrate wafer;
• following mounting, dicing the semiconductor wafer and the substrate wafer to form a package comprising an integrated circuit die attached to a portion of the substrate wafer with a portion of the adhesive layer therebetween;
• providing a testing apparatus configured to electrically connect the package to test circuitry;
• and
• testing the package by placing the package in the testing apparatus and applying test signals through the testing apparatus to integrated circuits on the die.

A semiconductor packaging method comprising:

• providing a wafer comprising a first substrate with a plurality of integrated circuit dice formed thereon;
• thinning the first substrate to a thickness of from about 1-14 mils using chemical mechanical polishing;
• attaching a backside of the first substrate to a second substrate by depositing an adhesive between the first substrate and the second substrate;
• dicing the first substrate and the second substrate to form a plurality of separate packages, each package comprising a die, an adhesive layer and a portion of the second substrate;
• providing a testing apparatus configured to electrically connect a package to test circuitry;
• testing the package by applying test signals through the testing apparatus to the package;
• and
• following testing mounting the package to a third substrate in a chip on board configuration.

A semiconductor packaging method comprising:

• providing a semiconductor wafer;
• thinning the semiconductor wafer by chemically mechanically polishing a backside thereof to form a thinned semiconductor wafer having a thickness between about 1-14 mils;
• providing a substrate wafer;
• attaching the thinned semiconductor wafer to the substrate wafer by depositing an adhesive therebetween;
• dicing the thinned semiconductor wafer and the substrate wafer to form a semiconductor package comprising a die, a substrate and an adhesive layer;
• providing a testing apparatus configured to electrically connect the package to test circuitry;
• testing the package by placing the package in the testing apparatus and applying test signals through the testing apparatus to integrated circuits on the die;
• and
• following testing, flip chip mounting the package to a supporting substrate.

A semiconductor packaging method comprising:

• providing a semiconductor wafer comprising a plurality of integrated circuit dice;
• thinning the semiconductor wafer by etching a backside thereof to form a thinned semiconductor wafer having a thickness between about 1-14 mils;
• providing a substrate wafer;
• attaching the thinned semiconductor wafer to the substrate wafer by forming an adhesive layer therebetween;
• dicing the thinned semiconductor wafer and the substrate wafer to form a semiconductor package comprising an integrated circuit die and a substrate;
• providing a testing apparatus configured to electrically connect the package to test circuitry;
• placing the package in the testing apparatus and testing the package by applying test signals through the testing apparatus to integrated circuits on the die;
• and
• following testing, mounting the package to a supporting substrate in a chip on board configuration.