Deposition of high quality conformal silicon oxide thin films for the manufacture of thin film transistors
AssigneeApplied Materials, Inc.
InventorsKam Law, Robert Robertson, Jeffrey Feng
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AssigneeApplied Materials, Inc.
InventorsKam Law, Robert Robertson, Jeffrey Feng
Estimating the term…
A plasma enhanced chemical vapor deposition process for depositing conformal silicon oxide thin films useful to make thin film transistors which have stable electrical properties and low charge centers onto a substrate comprising flowing a precursor gas mixture of silane and nitrous oxide, the latter at a high rate, at a pressure of at least about 0.8 torr and a temperature of from about 250.degree. to 350.degree. C. The effective volume of the reaction region between the gas manifold inlet and the substrate during processing is kept small.
A method of making thin film transistors on a large glass substrate at least about 350 mm on a side, or at least (350).sup.2 mm.sup.2 in area, comprising the steps of:
A method of making thin film transistors on a large glass substrate at least about 350 mm on a side, or at least (350).sup.2 mm.sup.2 in area, comprising the steps of:
Dependencies are inferred from the claim text.
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Using internal electrodes: flat-bed apparatus
Oxides: by deposition from the vapour phase
Containing silicon: silicon dioxide
Manufacture or treatment: of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
Term ended 9 Dec 2013 (estimated)
USPTO file history isn’t available for this patent, so only indexed dates are shown.
This invention relates to the deposition of silicon oxide thin films onto large area substrates. More particularly, this invention relates to the deposition of conformal thin films of silicon oxide which have low surface charge.
In the manufacture of liquid crystal cells, two glass plates are joined together with a layer of a liquid crystal material sandwiched between them. The glass substrates have conductive films thereon (at least one of which is transparent, such as an ITO film) that can be connected to a source of power to change the orientation of the liquid crystal material. Various areas of the liquid crystal cell can be accessed by proper patterning of the conductive films. More recently, thin film transistors (hereinafter TFT) have been used to separately address areas of the liquid crystal cell at fast rates. Such liquid crystal cells are useful for active matrix displays such as TV and computer monitors.
As the requirements for resolution of liquid crystal monitors has increased, it has become desirable to separately address a plurality of areas of the liquid crystal cell, called pixels. Since about one million pixels are present in modern displays, at least the same number of transistors must be formed on the glass plates so that each pixel can be separately addressed.
FIG. 1 is a cross sectional view of a CVD reactor useful for deposition of silicon oxide thin films onto large area glass plates.
FIG. 2 is a graph of deposition rate versus distance along a substrate of a silicon oxide film deposited at a low deposition rate.
FIG. 3 is a graph of deposition rate versus distance along a substrate of a silicon oxide film deposited at a high deposition rate.
We have found that we can deposit electrically stable, conformal silicon oxide thin films over large area glass substrates having preformed patterns thereon by CVD processing at variable deposition rates. The variable deposition rates are achieved by optimizing the process parameters for a particular deposition rate, which parameters include the pressure, RF power, gas flows, electrode/gas manifold spacing and substrate temperature. A high flow rate of N.sub.2 O improves the electrical characteristics and stability of the resultant silicon oxide film. It is believed that the N.sub.2 O reduces the fixed charge, charge trapping sites and certain undesirable chemical constituents, such as water, --OH radicals, and hydrogen in the form of N--H or Si--H bonds.
U.S. Pat. No. 4,892,753 to Wang et al, incorporated herein by reference, describes a plasma enhanced CVD reactor having features suitable for carrying out the present CVD process. Although the reactor of this reference is described in terms of depositing passive silicon oxide on semiconductor wafers, suitable adjustments of size will accommodate the present large area glass substrates.
The reactor will be further described with reference to FIG. 1.