Method for dry etching sidewall polymer
AssigneeVLSI Technology, Inc.
InventorRamiro Solis
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Abstract
A method of plasma etching photoresist and sidewall polymer with an etch gas mixture comprising CF.sub.4 and H.sub.2 O demonstrating very aggressive ashrate of photoresist but maintains an exceptionally low etch rate for titanium nitride and other metals is provided. The very low TiN etch rate permits the inventive method to effectively breakdown sidewall polymer without removing any significant amount of these metals. The invention is particularly suited for stripping sidewall polymer from etched via holes and from etched metal lines.
Claims24
A method of removing polymer from a semiconductor wafer which includes a multilayer metal structure on the wafer that comprises a first metal layer, a second metal layer, and optionally, a third metal layer that is a barrier layer which presents diffusion of second metal into the wafer, said method comprising the steps of:
- (a) positioning said wafer into a chamber wherein the wafer includes polymer that is adjacent to the multilayer metal structure;
- (b) introducing etchant gases comprising CF.sub.4 and H.sub.2 O into the chamber;
- (c) applying energy to the etchant gases to generate a plasma;
- and
- (d) etching the polymer, wherein the ratio of the etch rate for polymer to the etch rate for the multilayer metal structure is at least 5 to 1.
A method of removing post etch polymer residue from a semiconductor device containing a metal layer that is formed of material that is selected from the group consisting of Ti, W, TiN, and TiW and wherein the metal layer is adjacent to the polymer residue, said method comprising the steps of:
- (a) positioning said semiconductor device into a chamber;
- (b) introducing etchant gases consisting essentially of CF.sub.4 and H.sub.2 O into the chamber;
- (c) applying energy to the etchant gases;
- and
- (d) etching the polymer residue wherein the ratio of the etch rate for residue polymer to the etch rate for the metal layer is at least 5 to 1.
A method of forming a via contact hole in a semiconductor device that comprises the steps of:
- (a) forming a metal structure on a wafer wherein the metal structure comprises a first metal layer and a second metal layer that is underneath the first metal layer;
- (b) forming a dielectric layer on said first metal layer;
- (c) forming a photoresist pattern after a photoresist layer is coated on said dielectric layer;
- (d) forming a via contact hole by an etching process employing said photoresist pattern as a mask;
- and
- (e) removing a layer of polymer on said via contact hole and at least a part of said photoresist layer by a process comprising the steps of:
- (i) positioning said semiconductor device comprising said via contact hole into a chamber;
- (ii) introducing etchant gases comprising CF.sub.4 and H.sub.2 O into the chamber;
- (iii) applying energy to the etchant gases generate a plasma;
- and
- (iv) etching the polymer wherein the ratio of the etch rate for polymer to the etch rate for the capping metal is at least 5 to 1.
Dependencies are inferred from the claim text.