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AssigneeBay Networks, Inc.
InventorsRichard L. Angle, Edward S. Harriman, Jr., Geoffrey B. Ladwig
Estimating the term…
A multitasking computer system having multiple parallel and independently executing processors. Each processor has multiple pipeline stages. Each stage in the pipeline can be simultaneously executing a process. More processes than the sum of pipeline stages for all processors exist at any given time, which allows processes to migrate between processors and allows the processes queued at any one processor to increase, i.e., back up, momentarily without causing other processors to sit idle. Related to the ability to support at least as many processes as there are the sum of pipeline stages in all of the processors is the ability of the preferred embodiment of the present invention to migrate processes between processors. When a processor completes execution of an instruction for a particular process, the program counter for the process is incremented to point to the next instruction in the process. The process is then requeued by a scheduler. A instruction fetch unit fetches the next instruction and associated arguments, if any, and dispatches the process to the same or other processor for execution of the next instruction in the process. Thus, a process can migrate from one processor to another processor.
A multitasking computer system having a plurality of parallel processors, a scheduler for scheduling a plurality of processes among the plurality of parallel processors, a dispatcher for dispatching the plurality of processes to the plurality of processors, the plurality of processors each having at least one pipeline stage, comprising:
A computer system comprising:
A computer system comprising:
A multitasking computer system having a scheduler for scheduling a plurality of processes, a dispatcher for dispatching the plurality of processes, comprising:
Dependencies are inferred from the claim text.