Microprocessor having PC card interface

A microprocessor formed on a semiconductor substrate comprising:

• a central processing unit which generates logical address signals to access an external address space of the microprocessor, wherein the external address space includes an address space for a PC card;
• a memory management unit which converts the logical address signals into physical address signals;
• a bus controller including:
• means for receiving the physical address signals to provide the received physical address signals external to the microprocessor;
• and
• means for generating control signals for the card in response to an access of the card by the physical address signals.

A bus state controller in an integrated microprocessor, comprising:

• address providing means for providing an address signal in response to an access to an external address space which is divided into a plurality of address areas;
• data means for providing and receiving data to and from an address of one of the plurality of address areas which is accessed by the address signal;
• first register means for storing attribute data that defines attributes of the plurality of address areas, wherein one of the plurality of address areas is assigned for a PC card;
• control signal generating means coupled to the first register means and for providing control signals including a card enable signal which enables the card in response to an access to the card by the address signal;
• second register means for storing first data which defines a delay time to set up the address signal for start control signals for the card;
• and
• timing control means coupled to the second register and for generating the start control signals in accordance with the first data stored in the second register means.

A microprocessor on a semiconductor substrate comprising:

• a central processing unit for providing an address signal to access an address in an external address space of the microprocessor;
• first terminals;
• second terminals;
• an address control circuit coupled to the first terminals and for delivering the address signals from the central processing unit external to the microprocessor;
• a data input and output circuit coupled to the second terminals;
• and
• a control signal generation circuit responsive to the address signal and for generating control signals external to the microprocessor,
• wherein the control signal generation circuit provides card enable signals as the control signal when detecting that the address signal designates an address in a first address space for a card, and
• wherein the control signal generation circuit generates a chip select signal as the control signal for a semiconductor memory when detecting that the address signal designates an address in a second address space for the semiconductor memory.

A microprocessor formed on a semiconductor substrate comprising an interface circuit, wherein the interface circuit provides an interface for connecting semiconductor memories and one or more PC cards directly to the microprocessor;

• wherein the interface circuit generates a plurality of control signals to control the semiconductor memories and the PC cards, wherein the semiconductor memories and the PC cards are coupled to the microprocessor via an external bus which is coupled to the microprocessor;
• wherein the semiconductor memories include a ROM, a burst ROM, an SRAM, a PSRAM, a DRAM and/or a synchronous DRAM;
• wherein the PC cards comprise a memory card and/or an I/O card;
• wherein the microprocessor accesses the external bus using physical addresses in an address space, wherein the address space is divided into a plurality of areas assigned fixedly to predetermined semiconductor memories and PC cards, and wherein the microprocessor further comprises a central processing unit that outputs an internal logical address and a memory management unit coupled to the central processing unit that converts the internal logical address to a physical address applicable to the external bus.