US 5,848,009 A · Integrated circuit memory devices that map nondefective memory cell blocks into continuous addresses

Abstract

Integrated circuit memory devices and operating methods map a plurality of memory cell blocks excluding defective memory cell blocks into a continuous address sequence of variable length. The memory cell blocks excluding the defective memory cell blocks, are preferably mapped to defective normal memory cell blocks, beginning at a highest memory cell block address and sequentially proceeding to lower cell block addresses, so as to generate continuous addresses for the memory cell blocks. Continuous address spaces may be provided by providing a plurality of flag blocks, a respective one of which corresponds to a respective one of the normal memory cell blocks. Each flag block contains a first indication that the corresponding normal memory cell block is nondefective, a second indication that the corresponding normal memory cell block is substituted with a redundant memory cell block, or a third indication that the corresponding normal memory cell block is substituted with another normal memory cell block. Then, upon addressing a normal memory cell block, a redundant memory cell block is substituted if the second indication is in the flag block that is associated with the selected normal memory cell block. A nondefective normal memory cell block is substituted for a selected normal cell block in response to the third indication being in the flag block that is associated with the selected normal memory cell block.

Claims17

Dependent claims

An integrated circuit memory device comprising:

a plurality of normal memory cell blocks;
a plurality of redundant memory cell blocks;
and
means for substituting nondefective normal memory cell blocks for defective normal memory cell blocks that remain after substitution of the plurality of redundant memory cell blocks for defective normal memory cell blocks, so as to generate continuous addresses for the nondefective normal memory cell blocks.

1 more element

An integrated circuit memory device comprising:

a plurality of normal memory cell blocks;
a plurality of redundant memory cell blocks;
a plurality of flag blocks, a respective one of which corresponds to a respective one of the normal memory cell blocks, each flag block containing one of a first indication that the corresponding normal memory cell block is nondefective, a second indication that the corresponding normal memory cell block is substituted with a redundant memory cell block, and a third indication that the corresponding normal memory cell block is substituted with another normal memory cell block;
and
means, responsive to the plurality of flag blocks, for substituting a redundant memory cell block for a selected normal memory cell block in response to the second indication being in a flag block that is associated with the selected normal memory cell block and for substituting a nondefective normal memory cell block for a selected normal memory cell block in response to the third indication being in a flag block that is associated with the selected normal memory cell block.

2 more elements

Dependencies are inferred from the claim text.

Integrated circuit memory devices that map nondefective memory cell blocks into continuous addresses

Life of this patent

Integrated circuit memory devices that map nondefective memory cell blocks into continuous addresses

Life of this patent

Abstract

Claims17