Product-summing arithmetic circuit

A product-summing arithmetic circuit comprising:

• a first circuit and a second circuit, each of said first and second circuits including means for sequentially generating a plurality of partial products and means for performing a digit-adjustment accumulation of said generated partial products while truncating the least significant bit (LSB) of an intermediate accumulation result for every cycle;
• borrow bit generation means for holding a borrow bit of one cycle before and for generating a borrow bit of a current cycle by performing an addition of the LSB of an intermediate accumulation result of said first circuit, an inverted bit of the LSB of an intermediate accumulation result of said second circuit and said one-cycle-before borrow bit;
• and
• a third circuit for finding a final arithmetic operation result by performing a subtraction of a sum of a final accumulation result of said second circuit and a final borrow bit of said borrow bit generation means from a final accumulation result of said first circuit.

A product-summing arithmetic circuit comprising:

• a first circuit and a second circuit, each of said first and second circuits including means for sequentially generating a plurality of partial products and means for performing a digit-adjustment accumulation of said generated partial products while truncating the least significant bit (LSB) of an intermediate accumulation result for every cycle;
• carry bit generation means for holding a carry bit of one cycle before and for generating a carry bit of a current cycle by performing an addition of the LSB of an intermediate accumulation result of said first circuit, the LSB of an intermediate accumulation result of said second circuit and said one-cycle-before carry bit;
• borrow bit generation means for holding a borrow bit of one cycle before and for generating a borrow bit of a current cycle by performing an addition of the LSB of an intermediate accumulation result of said first circuit, an inverted bit of the LSB of an intermediate accumulation result of said second circuit and said one-cycle-before borrow bit;
• and
• a third circuit capable of finding a final arithmetic operation result by performing an addition of a final accumulation result of said first circuit, a final accumulation result of said second circuit and a final carry bit of said carry bit generation means and capable of finding a final arithmetic operation result by performing a subtraction of a sum of a final accumulation result of said second circuit and a final borrow bit of said borrow bit generation means from a final accumulation result of said first circuit.