Optimized routing scheme for an integrated circuit/printed circuit board

An apparatus comprising:

• an integrated circuit chip having a first voltage supply rail for receiving a first supply voltage;
• an interconnect substrate coupled to the integrated circuit chip, the interconnect substrate having a first plurality of electrically conductive pads exposed at a surface of the interconnect substrate;
• means for coupling the first plurality of pads to the first voltage supply rail;
• a printed circuit board having a plurality of insulating layers, a first electrically conductive layer for receiving the first supply voltage located between the insulating layers, a first voltage supply pad pattern located over the insulating layers, and a first electrically conductive via plug which extends through the insulating layers and contacts the first conductive layer and the first voltage supply pad pattern, wherein the first voltage supply pad pattern comprises a second plurality of electrically conductive pads which are coupled by one or more electrically conductive traces;
• and
• means for connecting the first plurality of pads to the second plurality of pads.

A method of routing a supply voltage through a multi-layer printed circuit board, the method comprising the steps of:

• applying the supply voltage to an electrically conductive interconnect layer in the printed circuit board;
• routing the supply voltage from the interconnect layer to an electrically conductive via plug which extends through one or more layers of the printed circuit board;
• and
• routing the supply voltage from the via plug to a pad pattern at an external surface of the printed circuit board, the pad pattern comprising a plurality of electrically conductive pads, whereby the via plug provides the plurality of pads with the supply voltage.