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AssigneeMatsushita Electric Industrial Co., Ltd.
InventorsHiroyuki Yasoshima, Katsuhiko Ueda
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This invention provides a code generator for reduction of the power consumption of digital signal processors. A plurality of codes are prepared for an item of data. A code with the lowest polarity-inverting bit count for input data, is selected from among the prepared codes. The code generator of the present invention has a code generation section, a code selection section and a code output section. The code generation section inputs data from a data file and generates all codes allocated to the input data. The code selection section makes a comparison between each of the generated codes and a code that is transferred just before or after any one of the generated codes is transferred over a bus of the digital signal processor, in order to select from among the generated codes a code having the lowest polarity-inverting bit count. The code output section writes the selected code into a code file. In addition, the code output section temporarily holds the selected code and outputs it to the code selection section as a comparison target code used to select the next code.
A data transmission device comprising:
A data transmission method, for converting input data items into codes and transmitting said codes to a processor, wherein at least one code of a bit width equal to that of the input data items is assigned for each input data item and multiple different codes of the bit width equal to that of the input data items are assigned for some of the data items, and wherein said processor has a bus for code transfer and a decoder which interprets all codes assigned for said input data item as said input data item, said data transmission method comprising:
A data transmission device comprising:
A data transmission method, for converting input data items into codes and transmitting said codes to a processor, wherein at least one code is assigned for each input data item and multiple different codes are assigned for some of the data items, and wherein said processor has a bus for code transfer and a decoder which interprets all codes assigned for said input data item as said input data item, said data transmission method comprising:
An object code generator for converting a plurality of instructions of a program that is processed by a processor, each into an object code of a bit width equal to that of the instructions,
A processor, comprising:
An object code generation method for converting a plurality of instructions of a program that is executed by a processor, each into an object code of a bit width equal to that of the instructions, wherein a plurality of different object codes are provided for at least one of said instructions of said program that is executed by said processor, and wherein said processor has an instruction bus for object code transfer and an instruction decoder which interprets all object codes provided for an instruction as said instruction,
A processor, comprising:
A processor, comprising:
A code generator for converting input data items into codes, each of a bit width equal to that of the data items, and for outputting said codes, said code generator providing a plurality of different codes for at least one of said input data items, and said code generator selecting, when a plurality of codes are provided for an input data item, one code from among said plurality of codes so that the number of bit line polarity-inversion occurrences in a bus of a processor which processes said input data item is minimized.
A code generation method, for converting input data items into codes, each of a bit width equal to that of the data items, wherein:
An object code generator, comprising:
A processor, comprising:
A code generator, that receives data items, assigns at least one code for each data item and multiple different codes for some data items, and outputs the codes for processing by a processor;
An object code generation method, for converting instructions into codes, and some of the instructions into multiple different codes, and transmitting said codes to a processor, wherein at least one code is assigned to each instruction, and wherein said processor has a bus for code transfer and a decoder which interprets all codes assigned to said instruction as said instruction, said data transmission method comprising:
A code generation method, for converting input data items into codes, and some data items into multiple different codes, and transmitting said codes to a processor, wherein at least one code is assigned to each input data item, and wherein said processor has a bus for code transfer and a decoder which interprets all codes assigned to said input data item as said input data item, said data transmission method comprising:
Dependencies are inferred from the claim text.