Threshold detecting device

#The present invention relates to a threshold detecting device, in particular for determining whether the booster or supply voltage of a storage device has reached a predetermined threshold permitting the performance of various functions.

#As is known, to permit the performance of functions requiring a high supply voltage, nonvolatile memories with a low supply voltage Vcc comprise a voltage booster section for generating a higher output voltage. For example, in the case of flash memories with a supply voltage of only 3 V, a voltage booster is required for generating the cell reading voltage. As the voltage booster, when turned on, takes some time to supply the required output voltage, circuits are required for determining the output level of the voltage booster and indicating when it reaches the minimum acceptable threshold, i.e., by generating an enabling signal permitting performance of the high-voltage functions.

#As the device, too, when turned on, presents a transient state before reaching the steady-state supply voltage, which, in currently used memories, must be guaranteed to prevent malfunctioning, a detecting circuit is again required for monitoring the supply voltage and generating an enabling signal upon the supply voltage reaching a predetermined threshold.

#A number of preferred, non-limiting embodiments of the present invention will be described by way of example with reference to the accompanying drawings.

#FIG. 1 shows a block diagram of a first embodiment of the present device for monitoring booster voltage.

#FIG. 2 shows a voltage graph relative to the device of FIG. 1.

#FIG. 1 shows a device 1 for detecting when a booster voltage Vb reaches a given threshold. Device 1 is integrated in a known memory 100 comprising a voltage booster stage 101 supplying booster voltage Vb; a logic portion 102 generating signals DET and R for turning on and resetting device 1, and which is supplied by device 1 with an output signal OUT, the logic value of which indicates whether or not booster voltage Vb has exceeded a given threshold; and a memory array 103 comprising memory cells 104. Circuits of the same type as voltage booster circuit 101, logic portion 102 and memory array 103 are well known in the art. Any person of skill in the art would be able to use existing circuits to provide these devices and their output if given the teachings of this patent.

#Device 1 includes a level adapting stage 2 having two inputs 3, 4 supplied respectively with a monitoring enabling signal DET and the monitored voltage Vb, and two outputs 5, 6 supplying respective signals EN1, EN2. Signal EN1 is supplied to the input 7 of a source stage 8, the output 9 of which presents a reference voltage V1; and signal EN2 is supplied to the input 12 of a limiting stage 13 also supplied with voltage V1 at terminal 14. Voltage V1 is also supplied to one input 15 of a latch type threshold detecting stage 16, a second input 17 of which is supplied with monitored voltage Vb, and the output 18 of which supplies a logic signal LA. The output 18 of detecting stage 16 is connected to an input 20 of a latch stage 21, the output 22 of which supplies an OUT signal for logic portion 102 and/or other circuits of memory 100, and stages 16 and 21 present respective reset inputs 24, 25 supplied with a reset signal R.

#More specifically, adapting stage 2 provides for adapting the levels of the input logic signals supplied by stages 101 and 102 of memory device 100 to the levels of detecting device 1, and supplies opposite output signals EN1 and EN2 switchable between zero and voltage Vb, so that the high signal EN1 or EN2 is latched to and follows the course of voltage Vb.