Low power CMOS precision input receiver with integrated reference

Abstract

A receiver circuit is provided. The receiver circuit includes a differential stage that has a first input that receives a first signal, a second input that receives a reference signal and an output. The receiver circuit further includes first and second switch devices that receive the first signal and in response to this signal, couple the differential stage to a first and a second, respectively, voltages when the first signal is within a first voltage range. The receiver circuit also includes a keeper circuit that has an input that receives the first signal and an output coupled to the output of the differential stage. The keeper circuit clamps the output to a third voltage when the first signal is within a second voltage range. The keeper circuit also clamps the output to a fourth voltage when the first signal is within a third voltage range.

Dependencies are inferred from the claim text.