US 5,847,575 A · Method and apparatus for performing switched supply drive in CMOS pad drivers

Abstract

A driver circuit for limiting electrical noise on a quiescent signal is provided which includes a Transition High Driver circuit, a Transition Low Driver circuit, a Quiescent High Driver circuit, and a Quiescent Low Driver circuit. The driver circuit comprises means for driving an electrical signal with a presumed noisy Transition Power Supply network while it is transitioning from a low voltage level to a high voltage level or vice versa. The signal is driven by the Transition Power Supply network until the electrical signal reaches its quiescent voltage level. At this time, the signal is no longer driven by the Transition Power Supply network but rather by a presumed clean Quiescent Power Supply network. In this manner, noise from transitioning signals is prevented from coupling onto quiescent signals.

Claims16

Dependent claims

An integrated circuit comprising:

a core logic area for generating a first logic level for an electrical signal, said first logic level corresponding to a first voltage level;
a driver circuit for amplifying said first logic level to a second voltage level and for minimizing electrical noise on said output signal by driving said output signal using a first power supply and a second power supply, each power supply alternatively selected depending upon the switching state of the electrical signal, and wherein said first power supply and said second power supply comprise voltage levels that are not equivalent.

A computer system comprising:

A central processing unit;
A memory system for storing programs to be run on said central processing unit;
An I/O system for communicating with I/O devices;
A system bus for connecting said central processing unit, said memory system, said cache memory system, and said I/O system;
At least one integrated circuit comprising a driver circuit for limiting electrical noise on a quiescent signal comprising:
a first circuit portion for driving said output signal using a first power supply network when said output signal is transitioning from a low state to a high state, said first power supply network having a first voltage magnitude;
a second circuit portion for driving said output signal with a second power supply network when said output signal is in a quiescent high state, said second power supply network having a second voltage magnitude, said second voltage magnitude being different from said first voltage magnitude;
a third circuit portion for driving said output signal with a Third Power Supply network when said output signal is transitioning from a high state to a low state;
a fourth circuit portion for driving said output signal with a fourth power supply network when said output signal is in a quiescent low state.

6 more elements

Dependencies are inferred from the claim text.

Method and apparatus for performing switched supply drive in CMOS pad drivers

Life of this patent

Method and apparatus for performing switched supply drive in CMOS pad drivers

Life of this patent

Abstract

Claims16