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US 5,847,449 AGranted
Semiconductor device
AssigneesMega Chips Corporation, Tom Dang-hsing Yiu
InventorsAkira Takata, Tetsuo Hikawa, Takashi Sawada, Tom Dang-hsing Yiu, Ful-Long Ni
Life of this patent
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Abstract
In order to reduce the chip size of a semiconductor device as well as to separate noises between at least two types of pads having different functions, at least one Vcc and at least one Vss are provided on opposite edges of a package (101) so that output pins or I/O pins are arranged therebetween and input pins are arranged outside the same. Non-connected excess pins (NC) are arranged on upper and lower boundaries, for omitting wires and reducing the chip size.
Claims2
A semiconductor device comprising:
- a chip and a package for storing the same;
- and
- a plurality of external connection pins being provided on two opposite edges of said package,
- said external connection pins including:
- power supply pins being formed on said two opposite edges of said package at least one by one respectively for supplying power to said chip, and
- ground pins being formed on said two opposite edges of said package at least one by one respectively for connecting said chip to the ground,
- power supply pads for connection to said power supply pins and ground connection pads for connection to said ground pins being provided on two opposite edges of said chip, respectively;
- and
- wherein said external connection pins include excess pins being not connected to the exterior,
- said excess pins being arranged between said power supply pins and said ground pins on said two opposite edges of said package respectively.
7 more elements
A semiconductor device comprising:
- a chip and a package for storing the same;
- and
- a plurality of external connection pins, including power supply and ground pins, being provided on two opposite edges of said package,
- said chip including:
- an internal circuit having at least single power supply terminals and at least single ground connection terminals on two opposite edges, respectively,
- a first pad portion for connecting said internal circuit with said power supply pins, and
- a second pad portion for connecting said internal circuit with said ground pins,
- said first pad portion comprising:
- power supply pads being formed on said two opposite edges of said chip at least one by one to be wired between said power supply terminals of said internal circuit and said power supply pins, and
- pad power supply wires being arranged in parallel with each other in the vicinity of two opposite edges of said internal circuit to be connected to said power supply pads, respectively,
- said second pad portion comprising:
- ground connection pads being formed on said two opposite edges of said chip at least one by one to be wired between said ground connection terminals of said internal circuit and said ground pins, and
- pad ground wires being arranged in parallel with each other in the vicinity of said two opposite edges of said internal circuit to be connected to said ground connection pads, respectively;
- wherein said external connection pins include excess pins being not connected to the exterior,
- said excess pins being arranged between said power supply pins and said ground pins on said two opposite edges of said package respectively.
12 more elements
Dependencies are inferred from the claim text.