Method and device for interconnecting integrated circuits in three dimensions
AssigneeThomson-CSF
InventorsChristian Val, Michel Leroy
Life of this patent
Estimating the term…
Abstract
A method and device for interconnecting stacked semiconducting plates, in which each of the plates has an integrated circuit. The semiconducting plates (P) are stacked and made solid with each other. In one embodiment, their connecting contacts are connected by a wire (F) to any one of the faces of the stack except one (B), which is to be in contact with a printed circuit. Connections of the plates together and with the printed circuit is made on the faces (F.sub.V, F.sub.S, F.sub.L) of the stack.
Claims13
Device for interconnecting semiconducting plates (P), each containing at least one integrated circuit and comprising electrical connecting contacts (P.sub.C) wherein the plates (P) are separated from and made solid with each other by being embedded and enveloped in an electrically insulating material (D) and are arranged with said material in the form of a solid stack having faces with said electrically insulating material on said faces, the electrical connecting contacts (P.sub.C) of the plates being joined electrically by conductors (F) extending to some of the faces of the stack, and the electrical linking of the conductors (F) together is performed by connections (C) on the electrically insulating faces of the stack, these connections being arranged on at least two faces of the stack.
Device for interconnecting semiconducting plates (P), each containing at least one integrated circuit and comprising electrical connecting contacts (P.sub.C) wherein the plates (P) are separated from and made solid with each other by being embedded and enveloped in an electrically insulating material (D) and are arranged with said material in the form of a solid stack with surfaces of said electrically insulating material (D), the electrical connecting contacts (P.sub.C) of the plates being joined electrically by conductors (F) extending to outer faces of some of the surfaces of the stack, and the electrical linking of the conductors (F) together is performed by connections (C) on the outer surfaces of the electrically insulating faces of the stack, these connections being arranged on at least two faces of the stack.
Device for interconnecting semiconducting chips, comprising a plurality of chips (P) each containing at least one integrated circuit and connecting contacts (P.sub.C), the chips (P) being made solid with each other with the help of an insulating material (D) in order to form a stack, the connecting contacts (P.sub.C) of the chips being joined electrically by conductors (F) to at least some of the faces of the stack, the electrical linking of the conductors (F) together being performed by connections (C) on the faces of the stack, at least some of these connections being arranged on at least two faces of the stack and these connections consist of a conducting layer (92) arranged in a groove (81) joining the conductors together.
Dependencies are inferred from the claim text.