Method for testing and verification of a CPU using a reference model
AssigneeDigital Equipment Corporation
InventorJames D. Huggins
Life of this patent
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Abstract
A method of testing a circuit design is provided which allows for the comparison output of an abstract reference model of the circuit and the circuit itself to the same set of input stimuli. The circuit under test may operate in a manner which produces unpredictable events, results, or data. Due to the nature of the reference model, unpredictable results, data, or events are not allowed to occur. Thus to compare the outputs of the two as a means of verifying the circuit design, the testing method allows for a comparison analysis of the outputs despite the possibility of unpredictable data and events occurring on the circuit and not the model.
Claims8
A method executed in a computer system for testing a central processing unit (CPU) comprising the steps of:
- constructing an abstract reference model of said CPU;
- generating a test file of random test stimuli;
- applying said test file to both said reference model and said CPU;
- recording an output response of said CPU and said reference model to said test stimuli into corresponding trace files;
- comparing on an entry by entry basis the contents of said corresponding trace files;
- detecting differences in said compared entries;
- determining whether said detected differences are due to errors or operational timing differences between said CPU and said reference model;
- continuing said comparing when said detected differences are due to said operational timing differences;
- and
- tracking unpredictable data values propagated through said trace files due to said operational timing differences.
Dependencies are inferred from the claim text.