Spiral scrambling
AssigneeEricsson Inc.
InventorPaul W. Dent
Life of this patent
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Abstract
A system and a method for transforming an N-bit input value into a transformed N-bit output value which may be used for error correction coding or ciphering of the N-bit input value. In a representative embodiment, the system comprises means for providing a set of all possible N-bit values as a plurality of mutually exclusive subsets each containing at least one possible N-bit value; means for comparing the N-bit input value with each of the subsets to determine to which one of the subsets the N-bit input value belongs; and means for selecting as the transformed N-bit output value an N-bit value from another one of the subsets. In accordance with the present invention, each of these subsets may be cyclically generated in a linear feedback shift register (LFSR) or, alternatively, stored in a memory.
Claims15
A system for transforming an N-bit input value into a transformed N-bit output value comprising:
- a plurality of linear feedback shift registers (LFSRs) each cyclically generating at its output a subset of all possible N-bit values which is not generated by any other of said LFSRs, the LFSRs together cyclically generating a set of all possible N-bit values;
- means for comparing each of said N-bit output values that are cyclically generated by said LFSRs to said N-bit input value to determine which of said N-bit output values matches said N-bit input value;
- and
- means for selecting as said transformed N-bit output value the output of one of said LFRSs other than the LFSR whose N-bit output value is determined to match said N-bit input value.
A system for transforming an N-bit input value into a transformed N-bit output value comprising:
- means for providing a set of all possible N-bit values as a plurality of mutually exclusive subsets each containing at least one possible N-bit value;
- means for comparing said N-bit input value with said subsets to determine to which one of said subsets said N-bit input value belongs;
- and
- means for selecting as said transformed N-bit output value an N-bit value from one of said subsets other than the one subset to which said N-bit input value is determined to belong.
A method for transforming an N-bit input value into a transformed N-bit output value comprising the steps of:
- providing a set of all possible N-bit values as a plurality of mutually exclusive subsets each containing at least one possible N-bit value;
- comparing said N-bit input value with said subsets to determine to which one of said subsets said N-bit input value belongs;
- and
- selecting as said transformed N-bit output value an N-bit value from one of said subsets other than the one subset to which said N-bit input value is determined to belong.
Dependencies are inferred from the claim text.