Main signal memory supervisory control system using odd-even alternative check

A main signal memory supervisory control system for controlling a main signal memory by using an odd-even alternative check, comprising:

• a parity generator, arranged on a write side of said main signal memory, for adding a parity bit to an input signal to output the signal and switching the oddness/evenness of the added parity bit by an odd-even switching signal;
• a parity detector, arranged on a read side of said main signal memory, for detecting a parity bit from a read signal to check the parity bit and receiving an odd-even switching signal to switch the oddness/evenness of the parity check;
• a write address counter for supplying a write address to said main signal memory;
• a read address counter for supplying a read address to said main signal memory;
• a state management section for receiving a generation notification of the write address from said write address counter to adding one to a counter of said state management section, receiving a generation notification of the read address from said read address counter to subtract one from the counter of said state management section, and calculating a data accumulation amount of said main signal memory to output the data accumulation amount;
• a down counter for receiving the data accumulation amount from said state management section, loading the data accumulation amount on a counter of said down counter when said down counter receives an accumulation amount load signal, subtracting one from the counter of said down counter each time said down counter receives the generation notification of the read address from said read address counter to output the count value;
• and
• a change point detector for receiving the count value of said down counter, sending the accumulation amount load signal to said down counter at the time when the count value changes from numerical value "1" to numerical value "0", and sending an odd-even switching signal to said parity generator and said parity detector.