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US 5,844,916 AGranted
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AssigneeMosaid Technologies Incorporated
InventorRichard C. Foss
Life of this patent
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Abstract
A method of testing an integrated circuit chip comprised of applying to and storing a first test pattern of data on the chip, applying a second test pattern of data to the chip which corresponds to the first test pattern, comparing the stored test pattern with the second test pattern on the chip, and indicating a test fault on a test pad in the event at least one bit of the first and second test pattern differ from each other.
Claims5
A method of testing an integrated circuit chip comprising:
- (a) applying to and storing a first test pattern of data on the chip,
- (b) applying a second test pattern of data to the chip which corresponds to the first test pattern,
- (c) comparing the stored test pattern with the second test pattern on the chip, and
- (d) indicating a test fault on a test pad in the event at least one bit of the first and second test pattern differ from each other.
1 more element
Dependencies are inferred from the claim text.