Current mode interface circuitry for an IC test device

A test device for an integrated circuit, said test device having an array of interface circuits for connection to an array of input/output lines of said integrated circuit under test, each interface circuit comprising:

• a source of an upper voltage level;
• resistor means having a first end connected to said source and having a second end;
• an output line connected to said second end for connection to one of said input/output lines;
• a plurality of parallel switchable current paths from said second end of said resistor means to a line having a lower voltage level than said upper voltage level, each current path having an "on" state and an "off" state;
• and
• logic circuitry coupled to said current paths to individually and selectively switch said current paths between said "on" state and "off" state such that a voltage drop across said resistor means is dependent upon the distribution of current paths in said "on" and "off" states, said logic circuitry having a common input to receive a test signal, said logic circuitry having a plurality of current control inputs having a one-to-one correspondence with said current paths,
• wherein for each of said current paths, said switching is responsive to a co-operation between a signal level at said common input and signal level at said current control input corresponding to said each current path.

A method of selectively inputting a test signal to an input/output line of an integrated circuit under test comprising steps of:

• connecting a plurality of transistors from a test output line to a fixed low voltage;
• connecting said test output line to a path to a source of a substantially fixed voltage, said path being one of a passive resistive path or an active path;
• connecting said test output line to said input/output line;
• selectively switching said transistors between "off" states and "on" states, thereby determining a voltage drop across said path between said output line and said source, said switching being responsive to a co-operation of inputs to logic circuitry controlling said transistors;
• connecting said test signal as one of said inputs to said logic circuitry such that said test signal is co-operatively associated with switching each of said transistors;
• and
• connecting a plurality of control signals to said logic circuitry such that each control signal is a second input that is co-operatively associated with switching individual transistors, said control signals having a one-to-one correspondence with said transistors.