Single-electron memory cell configuration
AssigneeSiemens Aktiengesellschaft
InventorsLothar Risch, Wolfgang Rosner
Life of this patent
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Abstract
Each memory cell of an array has a single-electron transistor and a single-electron memory element. The single-electron transistor is driven by a charge stored in the memory element. When a read voltage is applied, a current flows through the single-electron transistor which is dependent on the stored charge, but the stored charge in not changed. When a write voltage is applied, the magnitude of which is greater than the read voltage, then the stored charge is changed. The memory cells of the array are each connected between first lines and transverse second lines of a memory cell configuration.
Claims9
A single-electron memory cell configuration, comprising:
- a plurality of mutually parallel first lines and a plurality of mutually parallel second lines, said second lines extending transversely to said first lines;
- a plurality of memory cells each connected between one of siad first lines and one of said second lines;
- each of said memory cells having a single-electron memory element and a single-electron transistor;
- a first gate electrode connected to a respective one of said second lines and a memory node capacitively driven via said first gate electrode;
- said single-electron memory element including at least one tunnel element and a first tunnel contact connecting said at least one tunnel element to a respective one of said first lines and a second tunnel contact connecting said at least one tunnel element to said memory node driven via said first gate electrode;
- a second gate electrode connected to said memory node;
- said single-electron transistor having a first terminal connected to one of said first lines and a second terminal connected to one of said second lines, and said single-electron transistor being driven capacitively via said second gate electrode;
- said memory element and said single-electron transistor having respective capacitances adjusted such that, on application of a read voltage between said first line and said second line having a magnitude less than a write voltage, a current flows through said single-electron transistor, the current being dependent on a charge stored in said memory element, without changing the charge stored in the memory element, and such that, on application of the write voltage between said first line and said second line, the charge stored in the memory element is changed.
Dependencies are inferred from the claim text.