Method and apparatus for generating two-dimensional circuit pattern
AssigneeKabushiki Kaisha Toshiba
InventorKyoji Yamashita
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AssigneeKabushiki Kaisha Toshiba
InventorKyoji Yamashita
Estimating the term…
A method and an apparatus for generating, at a high speed, with high accuracy, a multi-gradation two-dimensional pattern without allowing graphic data of a two-dimensional circuit pattern to undergo bit development are provided. A scheme is employed to input coordinate values and external form dimensions of a plane figure to divide the coordinate values and the external form dimensions by sizes (dimensions) of pixels to normalize them to judge whether or not respective sides of the figure are included within the pixel sizes, whereby in the case where those sides are included, distances from central points of pixels to respective sides and angles thereof are determined with respect to all the pixels to determine density values of pixels by using the result to output the density values to an image memory to generate a two-dimensional circuit pattern within the memory.
A two-dimensional circuit pattern generating method of developing a circuit pattern constituted by plane figure including at least one oblique side into an image memory in which plural pixels are respectively equidistantly disposed in length and breadth directions,
A two-dimensional circuit pattern generating apparatus comprises:
Dependencies are inferred from the claim text.