Low power, high accuracy clock circuit and method for integrated circuits

An integrated circuit for providing low power, high accuracy clocking, comprising:

• first and second oscillators, said first oscillator being a low power oscillator relative to said second oscillator and said second oscillator being a high accuracy oscillator relative to said first oscillator;
• said second oscillator coupled to an external, high accuracy clock source;
• a first timer circuit operable to count clock cycles of said high accuracy oscillator and a second timer circuit operable to count clock cycles of said low power oscillator;
• and
• a programmable processor coupled to said low power oscillator and said high accuracy oscillator, said programmable processor operable to select said high accuracy oscillator as a processor clock source in a first mode and said low power oscillator as said processor clock source in a second mode, wherein said programmable processor monitors said clock cycles counted by said first and second timer circuits to identify a timing relationship between said high accuracy oscillator and said low power oscillator.

An integrated circuit for providing low power, high accuracy clocking, comprising:

• first and second oscillators, said first oscillator being a low power oscillator relative to said second oscillator and said second oscillator being a high accuracy oscillator relative to said first oscillator;
• said second oscillator coupled to an external, high accuracy clock source;
• a first timer circuit operable to count clock cycles of said high accuracy oscillator and a second timer circuit operable to count clock cycles of said low power oscillator;
• a programmable processor coupled to said low power oscillator and said high accuracy oscillator, said programmable processor operable to select said high accuracy oscillator as a processor clock source in a first mode and said low power oscillator as said processor clock source in a second mode, wherein said programmable processor monitors said clock cycles counted by said first and second timer circuits to identify a timing relationship between said high accuracy oscillator and said low power oscillator;
• and
• a multiplexer wherein said low power oscillator and said high accuracy oscillator are multiplexed to said programmable processor,
• wherein said programmable processor is operable to disable said high accuracy oscillator during a predetermined condition, and wherein said programmable processor uses said timing relationship to adjust for timing differences between said low power oscillator and said high accuracy oscillator when said high accuracy oscillator is disabled and said low power oscillator is operable as said processor clock source, and wherein said second timer circuit provides a stopclear signal via a logic circuit to said multiplexer to enable said processor clock source at predetermined intervals.

A method for clocking an integrated circuit comprising the steps of:

• coupling a high accuracy oscillator to an external, first clock source;
• selecting between said first oscillator and a second oscillator as a processor clock source via a programmable processor said first oscillator being a low power oscillator relative to said second oscillator and said second oscillator being a high accuracy oscillator relative to said first oscillator;
• counting clock cycles of said high accuracy oscillator with a first timer circuit and clock cycles of said low power oscillator with a second timer circuit;
• and
• monitoring said first and second timer circuits while said high accuracy oscillator is enabled to identify a timing relationship between said high accuracy oscillator and said low power oscillator.