Controllable signal conditioning circuit

A signal conditioning circuit having controllable preprogrammed threshold levels, said signal conditioning circuit comprising:

• means for generating a variable amplitude periodic input signal having a mid-line voltage;
• a microprocessor having an input for receiving a logic signal and said microprocessor providing a control signal in response to a logic signal;
• a trigger circuit with controllable threshold levels producing a logic signal in response to said variable amplitude periodic input, said trigger circuit exhibiting hysteresis between an upper threshold level and a lower threshold level, one of said threshold levels held constant at approximately said mid-line voltage of said variable amplitude periodic input signal and the other threshold level controlled through a plurality of predetermined threshold levels, said trigger circuit having a first input receiving said variable amplitude periodic input, a second input receiving said control signal, a third input for receiving a reference voltage and a logic signal output provided to said logic input signal of said microprocessor;
• and
• wherein the threshold level controlled through a plurality of predetermined threshold levels is controlled in response to said control signal received at said second input.

A method of electronically controlling the trigger threshold levels of a variable threshold level signal conditioning circuit supplying a timing signal to a microprocessor, the method comprising the steps of:

• (1) providing a variable amplitude periodic input signal having a mid-line voltage to an input of the signal conditioning circuit;
• (2) providing a logic HIGH or a logic LOW output signal from the signal conditioning circuit input, or the logic output signal corresponding to the frequency of the variable amplitude periodic input signal, the logic output signal determined by the relation of the input signal amplitude to a lower threshold level of the signal conditioning circuit which is held constant at the input signal mid-line voltage, a variable upper threshold level, of the signal conditioning circuit, and a current logic state of the signal conditioning circuit output signal;
• and
• (3) commanding the upper threshold level to remain at or switch to any one of a plurality of preprogrammed upper threshold levels in response to the frequency of the logic output signal received by the microprocessor compared to a plurality of predetermined frequency values stored in microprocessor memory.

A controllable threshold trigger circuit for receiving a variable amplitude periodic signal and providing a corresponding logic output, comprising:

• means for generating a variable amplitude periodic input signal having a mid-line voltage;
• a reference voltage approximately equivalent to said mid-line voltage;
• a comparator having an inverting input for receiving said reference voltage, a non-inverting input for receiving said input signal, and said comparator producing a digital logic output;
• an input resistor connected between said means for generating a variable amplitude periodic input signal and said non-inverting input;
• a feedback resistor connected between said non-inverting input and said digital logic output;
• wherein said comparator has positive feedback through said feedback resistor creating hysteresis in said comparator between an upper threshold level and a lower threshold level;
• wherein said reference voltage is selected to maintain the lower threshold level at approximately the mid-line voltage of said input signal;
• a diode having an output and an input;
• a first resistor having less resistance than said feedback resistor;
• a transistor having a base, a collector and an emitter;
• a control line;
• said transistor base connected to said control line, said transistor emitter connected to said logic output, said transistor collector connected to said diode output, said first resistor connected between said diode input and said non-inverting input of said comparator;
• and
• wherein a logic HIGH on said control line switches said transistor to the conduction mode establishing an alternative feedback path for said comparator thus raising the upper threshold level of said comparator.