Monolithic integrated sensor circuit

A monolithic integrated sensor circuit comprising:

• a sensor system for generating a sensor signal;
• a supply unit for generating current for the sensor system, the supply unit being coupled to a remainder of the monolithic integrated sensor circuit and defining a reference current polarity for biasing the sensor system;
• an amplifying stage for amplifying the sensor signal generated by the sensor system, the amplifying stage being defined by an input amplifier and an output amplifier, wherein the input amplifier is coupled to the sensor system for receiving the sensor signal, and the output amplifier receives an amplified sensor signal from the input amplifier and functions as an averaging combiner stage;
• at least three inverting means for periodically reversing the polarity of the sensor signal at equal time intervals coupled to a signal path of the amplifying stage, with one inverting means being coupled between the input and output amplifiers;
• and
• a clock signal source coupled to the at least three inverting means which generates a first switching clock and a second switching clock, wherein the first and second switching clocks have equal time intervals and control a signal through the at least three inverting means, wherein the first switching clock causes the signal to be switched through the at least three inverting means directly and the second switching clock causes cross-switching of the signal path so that the offset error of the amplifying amplifier stage is averaged out.

A monolithic integrated sensor circuit comprising:

• a sensor system for generating a sensor signal;
• a supply unit for generating current for the sensor system, the supply unit being coupled to a remainder of the monolithic integrated sensor circuit and defining a reference current polarity for biasing the sensor system;
• an amplifying stage for amplifying the sensor signal generated by the sensor system, the amplifying stage being defined by an input amplifier and an output amplifier, wherein the input amplifier is coupled to the sensor system for receiving the sensor signal, and the output amplifier receives an amplified sensor signal from the input amplifier and functions as an averaging combiner stage;
• at least three inverting means for periodically reversing the polarity of the sensor signal at equal time intervals coupled to a signal path of the amplifying stage, with one inverting means being coupled between the input and output amplifiers;
• a clock signal source coupled to the at least three inverting means which generates a first switching clock and a second switching clock, wherein the first and second switching clocks have equal time intervals and control a signal through the at least three inverting means, wherein the first switching clock causes the signal to be switched through the at least three inverting means directly and the second switching clock causes cross-switching of the signal path so that the offset error of the amplifying stage is averaged out;
• and
• two feedback resistors coupled to the output amplifier for feeding the output signal generated from the output amplifier back to the sensor system, wherein the two feedback resistors are also coupled to the input amplifier via two of said at least three inverting means.