Half-full flag generator for synchronous FIFOs

An apparatus for generating an output flag representing the fullness of a buffer, said apparatus comprising:

• a first state machine having a first input receiving a write clock, a second input receiving a read clock and a third input receiving a first look-ahead signal, said first state machine manipulating said inputs to produce a first output signal that is either at a first logic state or at a second logic state;
• a second state machine having a first input receiving said write clock, a second input receiving said read clock and a third input receiving a second look-ahead signal, said second state machine manipulating said inputs to produce a second output signal that is either at a first logic state or at a second logic state;
• and
• latch means for holding said first and second output signals in mutually exclusive states.

A method for indicating the fullness of a buffer comprising the steps of:

• generating a first output in response to a write clock, a first read clock and a look-ahead signal;
• generating a second output in response to a non look-ahead signal, a second read clock and said write clock;
• and
• generating a third output in response to a change of state in said first and second outputs, wherein said third output is at one logic state when said buffer is half-full and is at another logic state when said buffer is not half-full.