Methods for packaging tab-BGA integrated circuits

A method for packaging a TAB-BGA integrated circuit, comprising step of:

• providing a polyimide with a pre-laminated thin copper layer on each of the two sides thereof as a substrate;
• laminating, etching and developing a plurality of first dry film layers on both surfaces of said polyimide substrate, while defining a plurality of predetermined openings in an upper surface of said polyimide substrate;
• sequentially applying a double-layer electroplating operation of electronickelling and gold plating on the exposed surface of the upper first dry film layer;
• forming a plurality of electroplated double-layer protrusions after removing said first dry film layers;
• laminating, etching and developing a plurality of second dry film layers on both surfaces of a laminate, while defining predetermined openings in a lower surface of said laminate;
• serving said second dry film layers as a mask for etching the bottom thin copper layer on a lower side of said laminate;
• serving said bottom thin copper layer on the lower side as a mask for applying a laser etching operation to said polyimide substrate to form a pattern of holes without totally penetrating said polyimide substrate by the control of laser energy;
• laminating a third dry film layer on the upper surface of the laminate for protecting the pattern previously formed;
• applying an electrolytic plating operation to each hole in said polyimide substrate for forming electrolytic contacts by filling each hole with an electrolyte and the outer surface thereof being in a protruding form;
• removing said third dry film layer;
• etching the exposed top thin copper layer between the electroplated double-layer protrusions to separate the adjacent electroplated layers from each other;
• and
• respectively defining a chip installation hole and a plurality of through holes in a central position and other predetermined positions in two sides of the polyimide substrate by performing a laser drilling operation for defining a structure of mounting a chip between the two electroplated double-layer protrusions beside the chip installation hole.

A method for packaging a TAB-BGA integrated circuit, comprising steps of:

• providing a polyimide with a pre-laminated thin copper layer on each of two sides thereof as a substrate;
• laminating, etching and developing a plurality of first dry film layers on both surfaces of said polyimide substrate, while defining a plurality of predetermined openings in an upper surface of said polyimide substrate;
• sequentially applying a double-layer electroplating operation of electro-coppering and electronickelling on the exposed surface of the upper first dry film layer;
• forming a plurality of electroplated double-layer protrusions after removing said first dry film layers;
• laminating, etching and developing a plurality of second dry film layers on both surfaces of a laminate, while defining a plurality of predetermined openings in a lower surface of said laminate;
• serving said second dry film layers as a mask for etching the bottom thin copper layer on a lower side of said laminate;
• serving said bottom thin copper layer on the lower side as a mask for applying a laser etching operation to said polyimide substrate to form a pattern of holes without totally penetrating said polyimide substrate by the control of laser energy;
• laminating a third dry film layer on the upper surface of the laminate for protecting the pattern previously formed;
• applying an electrolytic plating operation to each hole in said polyimide substrate for forming electrolytic contacts by filling each hole with an electrolyte and the outer surface thereof being in a protruding form;
• removing said third dry film layer;
• laminating, etching and developing a plurality of fourth dry film layers on both surfaces of the laminate, while defining a plurality of openings in the predetermined positions of the upper fourth dry film layer;
• applying a gold plating operation to the predetermined openings for forming a plurality of gold plated protruding contacts;
• etching the exposed top thin copper layer between the electroplated double-layer protrusions to separate the adjacent electroplated layers from each other;
• and
• defining a chip installation hole and a plurality of through holes respectively in a central position and other predetermined positions in two sides of the polyimide substrate by performing a laser drilling operation for defining a structure of mounting a chip between the two electroplated double-layer protrusions beside the chip installation hole.