Use of sub divided pattern for alignment mark recovery after inter-level dielectric planarization
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsTsu-Yu Chu, Jui-Yu Chang, Kun-Pi Cheng
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsTsu-Yu Chu, Jui-Yu Chang, Kun-Pi Cheng
Estimating the term…
A mask, which does not require additional reticles, and a method of using the mask for recovering alignment marks in a wafer after an inter-level dielectric layer has been planarized and a second layer of metal has been deposited on the planarized inter-level dielectric layer are described. An alignment mark protection pattern and a clearout window pattern are sub-divided so they can be formed from a first and a second mask element. These mask elements can be formed in the peripheral region of the reticle used to pattern the device region of the wafer. The mask elements are used to expose the alignment mark protection pattern in a first layer of photoresist and the clearout window pattern in a second layer of photoresist.
A method of recovering alignment marks, comprising the sequential steps of:
Dependencies are inferred from the claim text.