Multi-stage high-performance amplifier

An amplifier circuit, comprising:

• a first differential amplifier stage having
• a first differential pair of input transistors having control electrodes arranged to receive an input signal and current electrodes coupled at a first common node,
• a pair of first outputs configured to emit a first output signal from the-first amplifier stage, and
• at least one first current-generating active load coupled to at least one of the pair of first outputs;
• a second amplifier stage having
• a second differential pair of input transistors having current electrodes coupled at a second common node and each of the second differential pair of input transistors having a control electrode coupled to a different one of the pair of first outputs to receive the first output signal from the first amplifier stage,
• a current source coupled to the second common node,
• at least one second output to emit a second output signal from the second amplifier stage, and
• at least one second current-generating active load coupled to the at least one second output;
• wherein all transistors in a feedforward signal path extending between the control electrodes of the first differential pair of input transistors and the at least one second output are of a common doping type;
• a first common-mode control network configured to control a common-mode level of the first amplifier stage based at least in part on the first output signal;
• and
• a second common-mode control network configured to control a common-mode level of the second amplifier stage based at least in part upon the second output signal.

A differential amplifier circuit having common-mode control comprising:

• a first differential amplifier stage having
• a pair of first opposite polarity input nodes configured to receive an input signal,
• a pair of first output nodes to emit a first output signal, and
• a current-controlled current source arranged to regulate a common-mode level of the first differential amplifier stage responsive to a control current at a control input thereof;
• a second differential amplifier stage having
• a differential pair of input transistors having a pair of first current electrodes coupled at a common node, and a pair of control electrodes coupled to the pair of first output nodes to receive the first output signal therefrom,
• a current source coupled to the common node, the current source generating a bias current including a first portion that drives the differential pair of input transistors and a second portion that serves as the control current for the current-controlled current source, at least one second output node arranged to be driven by a second output signal from a second current electrode of one of the differential pair of input transistors, and
• a load coupled to the at least one second output node;
• and
• a common-mode control network coupled to the common node and the control input of the current-controlled current source, the common-mode control network being arranged such that the second portion of the bias current flows therethrough to drive the control input of the current-controlled current source in the first amplifier stage to control the common-mode level of the first amplifier stage.