Packed semiconductor device with wrap around external leads
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorHideki Ishii
Life of this patent
Estimating the term…
Abstract
A semiconductor device with reduced thickness, improved heat radiation, and a stacked structure. Molded resin covers an IC chip wire and part of a die pad. The die pad is exposed from the molded resin. An external lead in the same plane as the exposed surface of the die pad extends to a side of the resin opposite the die pad and along the molded resin. This structure allows a reduction in thickness of the semiconductor device, the exposed die pad improves heat radiation, and the external lead on upper and lower surfaces of the resin allows the semiconductor devices to be stacked.
Claims9
A semiconductor device comprising:
- a semiconductor integrated circuit chip;
- a connection plate having a first main surface on which said semiconductor integrated circuit chip is mounted and a second main surface opposite the first main surface;
- a semiconductor device package body having side surfaces transverse to the second main surface and a first surface directly opposite the first main surface of said connecting plate, encapsulating said semiconductor integrated circuit and covering said first main surface of said connection plate not covered by said integrated circuit chip, wherein the second main surface of said connection plate is exposed from said package body;
- and
- an external terminal electrically connected to said integrated circuit chip, partially coplanar with said connection plate, contacting a side surface of said package body, and extending to and contacting the first surface of said package body.
A semiconductor device structure comprising:
- a plurality of semiconductor devices, each semiconductor device including:
- a semiconductor integrated circuit chip;
- a connection plate having a first main surface on which said semiconductor integrated circuit chip is mounted and a second main surface opposite the first main surface;
- a semiconductor device package body having side surfaces transverse to the second main surface and a first surface directly opposite the first main surface of said connecting plate and encapsulating said semiconductor integrated circuit and covering said first main surface of said connection plate not covered by said integrated circuit chip, wherein the second main surface of said connection plate is exposed from said package body;
- and
- an external terminal electrically connected to said integrated circuit chip, partially coplanar with said connection plate, contacting a respective side surface of said package body, and extending to and contacting the first surface of said package body, wherein said plurality of semiconductor devices are stacked with respective external terminals of adjacent semiconductor devices electrically connected together.
Dependencies are inferred from the claim text.