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US 5,835,501 AGranted
Built-in test scheme for a jitter tolerance test of a clock and data recovery unit
AssigneePMC-Sierra, Inc.
InventorsKamal Dalmia, Andre Ivanov, Brian Donald Gerson, Curtis Lapadat
Life of this patent
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Abstract
A jitter test system for a clock and data recovery unit (CRU) is comprised of a data generating apparatus, apparatus for clocking the data generating apparatus with a jittered clock, apparatus for applying a stream of data generated by the data generating apparatus that has been jittered by the jittered clock to an input of the CRU, and apparatus for detecting a bit error rate of a data signal output from the CRU.
Claims13
A jitter test system for testing a clock and data recovery unit (CRU) comprising:
- (a) a data generating means,
- (b) means for clocking the data generating means with a jittered clock having a predetermined jitter,
- (c) means for applying a stream of data generated by the data generating means that has been jittered by the jittered clock to an input of the CRU, and
- (d) means for detecting the bit error rate of the data signal output from the CRU.
1 more element
A method of testing a clock and data recovery unit (CRU) comprising:
- (a) generating a jittered clock having a predetermined jitter,
- (b) using the jittered clock to generate a test data stream,
- (c) feeding the test data stream to the CRU under test,
- (d) recovering a data stream from an output of the CRU, and
- (e) determining from the recovered data stream from the output of the CRU the bit error rate contained therein,
- whereby said bit error rate provides an indication of the tolerance of the CRU to jitter.
3 more elements
Dependencies are inferred from the claim text.