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US 5,835,396 AGranted
Three-dimensional read-only memory
OwnerGuobiao Zhanginventor
Life of this patent
Estimating the term…
Abstract
A read-only memory structure, having a three dimensional arrangement of memory elements, is disclosed. The memory elements are partitioned into multiple memory levels. Each memory level is stacked on top of another. Within each memory level, there are a plurarity of memory elements and address select lines. The memory elements can be either mask programmable or electrical programmable.
Claims20
A read-only memory element in an integrated circuit comprising:
- a first electrode, said first electrode comprising metallic materials;
- a second electrode, said second electrode comprising metallic materials;
- a quasi-conduction layer separating said first electrode and said second electrode, said quasi-conduction layer being a nonlinear resistor, having a low resistance at the read voltage and having a higher resistance when the applied voltage is smaller than the read voltage.
A semiconductor integrated circuit having at least one read-only memory level stacked level by level above a semiconductor substrate with decoders thereon, each memory level comprising:
- a plurality of spaced-apart memory element select lines, said select lines comprising metallic materials;
- a plurality of read-only memory elements, each of said memory elements comprising first and second metallic electrodes, said first metallic electrode being coupled to a first select line, said second metallic electrode being coupled to a second select line;
- an interlevel insulating layer covering said select lines and said memory elements at said memory level;
- a plurality of interlevel connecting vias through said memory level, said interlevel connecting vias providing coupling means between one memory level and said semiconductor substrate.
1 more element
Dependencies are inferred from the claim text.