Integrated circuit with a metal silicide film uniformly formed
AssigneeNEC Corporation
InventorsHiroshi Kawaguchi, Isami Sakai
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AssigneeNEC Corporation
InventorsHiroshi Kawaguchi, Isami Sakai
Estimating the term…
A method for manufacturing an integrated circuit, wherein, before providing an IC composite by forming a metal film on an IC assembly which includes a semiconductor substrate and a silicon part formed along the substrate and consisting essentially of silicon, an amorphous region is formed into the silicon part. The IC composite is subjected to first primary and secondary heat treatments in a nitrogen atmosphere and then to a second heat treatment at 600.degree.-700.degree. C., 700.degree.-900.degree. C., and 700.degree.-900.degree. C. to turn the metal film on the silicon part into a metal silicide film of excellent uniformity. The assembly has a silicon dioxide portion, on which the metal film is turned during the first primary and secondary heat treatments into a metal nitride film. The second heat treatment is carried out after the removal of the metal nitride film.
A method of manufacturing an integrated circuit, comprising the steps of manufacturing an integrated circuit assembly having an exposed assembly surface and including a semiconductor substrate and a doped silicon part formed of p-type and n-type diffusion regions along said semiconductor substrate to consist essentially of silicon and to have an exposed part surface as a portion of said assembly surface;
A method of manufacturing an integrated circuit comprising the steps of manufacturing an integrated circuit assembly having an exposed assembly surface and including a semiconductor substrate and a doped silicon part formed of p-type and n-type diffusion regions along said semiconductor substrate to consist essentially of silicon and to have an exposed part surface as a portion of assembly surface;
A method of manufacturing an integrated circuit, comprising the steps of:
A method as claimed in claim 10, wherein said ions of single impurity are arsenic or phosphorus ions.
A method of manufacturing a complementary metal-oxide-semiconductor integrated circuit, comprising the steps of:
Dependencies are inferred from the claim text.