Multi-value read-only memory cell having an improved signal-to-noise ratio
AssigneeSiemens Aktiengesellschaft
InventorsDoris Schmitt-Landsiedel, Roland Thewes, Michael Bollu, Paul-Werner von Basse
Life of this patent
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Abstract
The invention concerns a multi-valued read-only storage location which is constructed symmetrically for storing a first or second state (M, M"') and asymmetrically for storing at least a third state (M', M"). The advantage thereof is above all that the storage capacity is doubled without notably increasing expenditure and without impairing the signal-to-noise ratio with respect to conventional storage locations. The invention is suitable for electrically programmable and mask-programmable read-only memories, in particular for those used in low voltage technology.
Claims3
Multi-value read-only memory cell, having symmetrical construction for storing one of a first state and a second state and having asymmetrical construction for storing at least a third state, comprising:
- a MOS field-effect transistor having a source/drain region situated in a semiconductor body and having a drain/source region situated in the semiconductor body;
- in order to store the first state, a first cell connection connected directly to the source/drain region of the MOS field-effect transistor and a second cell connection connected directly to the drain/source region of the MOS field-effect transistor;
- in order to store the second state, the first cell connection connected via a first component to the source/drain region of the MOS field-effect transistor, and the second cell connection connected via a second component to the drain/source region of the MOS field-effect transistor;
- in order to store the third state, the first cell connection connected via the first component to the source/drain region of the MOS field-effect transistor, and the second cell connection connected directly to the drain/source region of the MOS field-effect transistor;
- in order to store a fourth state, the first cell connection connected directly to the source/drain region of the MOS field-effect transistor, and the second cell connection connected via the second component to the drain/source region of the MOS field-effect transistor;
- a third cell connection connected to a gate electrode of the MOS field-effect transistor, the gate electrode being electrically insulated from the semiconductor body by an insulation layer (ISO);
- and
- the first component being a first diode and the second component being a second diode.
A multi-value read-only memory cell, having symmetrical construction for storing a first state and a second state and having asymmetrical construction for storing at least a third state, comprising:
- a MOS field-effect transistor having a source/drain region situated in a semiconductor body and having a drain/source region situated in the semiconductor body;
- in order to store the first state a first cell connection connected directly to the source/drain region of the MOS field-effect transistor, and a second cell connection connected directly to the drain/source region of the MOS field-effect transistor;
- in order to store the second state, the first cell connection connected via a first component to the source/drain region of the MOS field-effect transistor and the second cell connection connected via a second component to the drain/source region of the MOS field-effect transistor;
- in order to store the third state, the first cell connection connected via the first component to the source/drain region of the MOS field-effect transistor, and the second cell connection connected directly to the drain/source region of the MOS field-effect transistor;
- in order to store a fourth state, the first cell connection connected directly to the source/drain region of the MOS field-effect transistor, and the second cell connection connected via the second component to the drain/source region of the MOS field-effect transistor;
- a third cell connection connected to a gate electrode of the MOS field-effect transistor, the gate electrode being electrically insulated from the semiconductor body by an insulation layer;
- and
- the first component being a first resistor and the second component being a second resistor.
Dependencies are inferred from the claim text.