Computer peripherals low-power-consumption standby system

A computer comprising:

• a central processing unit (CPU);
• a memory connected to the CPU for storing data and instruction routines;
• input apparatus coupled to the CPU for a user to provide input to the computer;
• a timer for detecting periods of inactivity of the computer;
• and
• a signal generator adapted for sending a power management command to a peripheral device;
• wherein the timer, in response to passage of a pre-stored period of inactivity of the computer, signals the signal generator to send the power management command to the peripheral device to assume a reduced-power state other than off.

A computer peripheral device having a port for signals for communicating with a host computer, comprising:

• a receiver adapted for receiving a power-management command;
• and
• a power manager circuit;
• wherein the receiver sends a command to the power manager circuit on receiving the power-management command, and the power manager circuit reduces power to power-using circuitry in the peripheral device to an intermediate level other than off in response to the command from the receiver.

A method for saving power in operation of a computer system wherein a host computer sends signals to a peripheral device, comprising steps of:

• (a) sensing periods of inactivity of the host computer;
• (b) sending a power-management command to the peripheral device in response to a period of inactivity of the host computer;
• (c) detecting the power-management command at the peripheral device by detection circuitry;
• (d) signaling power-management circuitry in the peripheral device from the detection circuitry that a power-management command is received;
• and
• (e) reducing power to power-using circuitry in the peripheral device to a level other than off by the power-management circuitry in response to the signal from the detection circuitry.

A computer peripheral device comprising:

• a detector adapted for detecting a power management command conveyed to said peripheral device by a host computer;
• and
• power level control circuitry responsive to said detector for managing power-using circuitry in said peripheral device;
• wherein said detector detects said power management command, and said power level control circuitry provides in response two reduced-power states for said peripheral device, one of the reduced-power states delayed for a predetermined period of time after the initiation of the other reduced-power state.

A computer peripheral device having a cathode filament and a filament heater, comprising:

• a detector adapted for detecting a power management command conveyed to said peripheral device by a host computer;
• and
• power level control circuitry responsive to said detector for managing power-using circuitry in said peripheral device;
• wherein said detector detects said power management command, and said power level control circuitry provides in response an intermediate reduced-power state wherein the filament heater is on.