Hard mask method for transferring a multi-level photoresist pattern

A method of etching integrated circuit material having a surface, the method comprising the steps of:

• a) depositing an etch selective mask overlying the surface of the integrated circuit material;
• b) forming a profile in the mask having a plurality of thicknesses;
• c) if there are openings through the mask profile, etching integrated circuit surface areas exposed through the openings in the mask profile with an etchant selective to the integrated circuit material;
• d) etching a layer of thickness from the mask profile, with an etchant selective to the mask, to reveal new integrated circuit surface areas;
• and
• e) repeating steps c) and d) until the last layer of mask profile thickness is etched away, whereby a pattern is etched into the integrated circuit material generally resembling the mask profile formed in step b).

A method for transferring a photoresist pattern onto an integrated circuit having dielectric interlevels and a surface, the method comprising the steps of:

• a) depositing a first hard mask layer having a first thickness overlying the integrated circuit surface, the first hard mask layer having a surface;
• b) depositing a second hard mask layer having a thickness overlying the first hard mask surface, the second hard mask layer having a surface, and the first and second hard mask layers being selectively etchable;
• c) depositing a layer of photoresist having a thickness overlying the second hard mask surface;
• d) forming a photoresist pattern having a first thickness less than the photoresist thickness, and a second thickness greater than the first thickness, the photoresist pattern also having an opening through the photoresist to expose a first surface area of the second hard mask;
• e) etching the second hard mask surface area exposed in step d) to expose a first surface area of the first hard mask;
• f) etching the first hard mask surface area exposed in step e) to expose a first surface area of the integrated circuit;
• g) etching a layer of photoresist greater than the first thickness, but less than the photoresist second thickness to expose a second surface area of the second hard mask;
• h) etching the second hard mask surface area exposed in step g) to expose a second surface area of the first hard mask;
• i) etching the integrated circuit surface area exposed in step f) to a dielectric interlevel;
• j) etching the first hard mask surface area exposed in step h) to expose a second surface area of the integrated circuit;
• and
• k) etching the integrated circuit surface area exposed in step j) to a dielectric interlevel, whereby a bilevel photoresist pattern is transferred to a bilevel hard mask, and the bilevel hard mask is used to form a multi-level pattern in the interlevel dielectric.