Operational amplifier with stabilized DC operations

An operational amplifier comprising:

• an input terminal for receiving an input signal;
• a comparator responsive to said input signal for generating a control signal for controlling said operational amplifier in a CHARGE, STANDBY or DISCHARGE mode;
• an output terminal for coupling to a capacitive load;
• a first current mirror PT.sub.17 -PT.sub.18 for supplying first and second currents in a proportional relationship;
• a current source PT.sub.15 for supplying a third current;
• a constant current source NT.sub.15 coupled to said current source for maintaining the sum of the second and third currents constant;
• a first transistor PT.sub.16 coupled to said current source for charging the capacitive load coupled to the output terminal at a current proportional to the third current;
• a second transistor NT.sub.14 coupled to said current mirror responsive to the input signal for controlling the charging of the capacitive load coupled to the output terminal;
• wherein the first current is proportional to a current in the second transistor;
• and
• a third current source P.sub.19 for supplying a constant idling current to the output terminal in a normal-state when the first transistor is not charging the capacitive load coupled to the output terminal.

An operational amplifier comprising:

• an input terminal for receiving an input signal;
• a comparator responsive to said input signal for generating a control signal for controlling said operational amplifier in a CHARGE, STANDBY or DISCHARGE mode;
• a first current source for supplying first and second currents in a proportional relationship;
• a second current source for supplying a third current;
• constant current means coupled to said first and second current sources for maintaining the sum of the second and third currents constant;
• a first transistor for charging a load coupled to an output terminal at a current proportional to the third current;
• a second transistor for controlling the charging of the load in response to the control signal;
• wherein the first current is proportional to a current flowing in the second transistor in response to the input signal;
• and
• a limiting circuit for limiting the first current during discharging.

An operational amplifier comprising:

• an input terminal for receiving an input signal;
• a comparator responsive to said input signal for generating a control signal for controlling said operational amplifier in a CHARGE, STANDBY or DISCHARGE mode;
• an output terminal for coupling to a capacitive load;
• a first current source for supplying first and second currents in a proportional relationship;
• a second current source for supplying a third current;
• constant current means coupled to said first and second current sources for maintaining the sum of the second and third currents constant;
• a first transistor for charging the capacitive load at a current proportional to the third current;
• a second transistor for controlling the charging of the capacitive load coupled to the output terminal in response to the input signal;
• wherein the first current is proportional to a current flowing in the second transistor in response to the input signal;
• a third current source for supplying a fourth current to the output terminal at least in a normal state, during neither charging nor discharging of the capacitive load;
• and
• a limiting circuit for limiting the first current during discharging.