Method for testing semiconductor dice with conventionally sized temporary packages

A method for testing a semiconductor die comprising:

• providing a base comprising a recess and a plurality of external leads in a configuration substantially equivalent to conventional semiconductor package leads conforming to standards of an industry standard setting body;
• providing an interconnect comprising a substrate and a plurality of contact members configured to make electrical connections with contact locations on the die;
• mounting the interconnect within the recess and bonding wires to the interconnect and to the base, the wires in electrical communication with the contact members and the external leads;
• providing a spring and a cover configured to mount within the recess and to bias the die against the interconnect, the cover including a second recess configured to enclose the spring and wires;
• placing the die on the interconnect with the contact members and contact locations in electrical communication;
• attaching the cover to the base with the spring biasing the die against the interconnect and with the second recess enclosing the spring and wires;
• and
• testing the die by applying test signals to the external leads.

A method for testing a semiconductor die comprising:

• providing an interconnect comprising a substrate and a plurality of contact members in electrical communication with a plurality of first conductors on the substrate, the contact members configured to make electrical connections with contact locations on the die;
• providing a base comprising a plurality of external leads in a configuration substantially equivalent to conventional semiconductor package leads conforming to standards of an industry standard setting body, the base further comprising a first recess for mounting the interconnect and a second recess with a plurality of second conductors in electrical communication with the external contacts;
• mounting the interconnect to the first recess and bonding wires to the first and second conductors;
• providing a spring and a cover configured to mount within the second recess and to bias the die against the interconnect;
• providing a clip attached to the base and contained within the second recess;
• placing the die on the interconnect with the contact members and contact locations in electrical communication;
• attaching the cover to the base using the clip;
• and
• testing the die by applying test signals to the external leads.

A method for testing a semiconductor die comprising:

• providing an interconnect comprising a substrate and a plurality of contact members in electrical communication with a plurality of first conductors on the substrate, the contact members configured to make electrical connections with contact locations on the die;
• providing a base comprising a plurality of external leads in a configuration substantially equivalent to conventional semiconductor package leads conforming to standards of an industry standard setting body, the base further comprising a plurality of second conductors in electrical communication with the external leads, and a recess with a bond shelf proximate to the second conductors;
• bonding wires to the first conductors and to the second conductors;
• providing a spring and a cover configured to mount within the recess and to bias the die against the interconnect, the cover including a second recess configured to enclose the spring and wires;
• placing the die on the interconnect with the contact members and contact locations in electrical communication;
• attaching the cover to the base with the spring biasing the die against the interconnect and with the second recess enclosing the spring and wires;
• and
• testing the die by applying test signals to the external leads.