Commonly housed diverse semiconductor die
AssigneeInternational Rectifier Corporation
InventorsChristopher Davis, Chuan Cheah, Daniel M. Kinzer
Life of this patent
Estimating the term…
Abstract
A MOSFET die and a Schottky diode die are mounted on a common lead frame pad and their drain and cathode, respectively, are connected together at the pad. The pad has a plurality of pins extending from one side thereof. The lead frame has insulated pins on its opposite side which are connected to the FET source, the FET gate and the Schottky diode anode respectively by wire bonds. The lead frame and die are molded in an insulated housing and the lead frame pins are bent downwardly to define a surface-mount package.
Claims40
A semiconductor device comprising, in combination, a first semiconductor die having opposing surfaces which contain respective electrodes, a second semiconductor die having opposing surfaces which contain respective electrodes, a thin conductive lead frame having a common main pad area having a first plurality of parallel pins integral with and extending from one edge thereof, and a second plurality of pins separated from one another and from said main pad area;
- said second plurality of pins being disposed along an edge of said main pad area opposite to the side thereof containing said first plurality of pins;
- one of said opposing surfaces of each of said first and second semiconductor die being disposed atop and in electrical contact with said common main pad area and being laterally spaced from one another;
- the opposite ones of said opposing surfaces of said first and second die being wire bonded to respective ones of said second plurality of pins;
- and a molded housing for encapsulating said lead frame and said first and second die and said bonding wires;
- said first and second pins extending beyond the boundary of said molded housing and available for external connection.
A surface-mount package which contains a MOSFET die and a Schottky diode die;
- said surface-mount package having a lead frame which has a common main pad section having a first plurality of pins integral with said common main pad section extending through one edge of said housing and a second plurality of coplanar insulated pins extending through an edge of said die opposite to said one edge;
- said MOSFET die having a drain electrode on one surface and a source electrode and gate electrode on an opposite surface;
- said Schottky diode containing a cathode electrode on one surface and an anode electrode on an opposite surface;
- said drain electrode and said cathode electrode being fixed in surface-to-surface contact with said common main pad section of said lead frame at laterally displaced locations;
- said anode electrode, said source electrode and said gate electrode being wire bonded to respective ones of said second plurality of pins within said housing.
A semiconductor device comprising:
- a lead frame having a plurality of leads and a common die pad, said die pad being integral with respective ones of said plurality of leads that extend from an edge of said die pad;
- a first semiconductor chip having a bottom surface that is secured to said common die pad and comprising a MOSFET having a source terminal, a drain terminal and a gate terminal;
- a second semiconductor chip having a bottom surface that is secured to said common die pad and comprising a Schottky diode having an anode terminal and a cathode terminal;
- wherein each of said source terminal, said drain terminal, said gate terminal, said anode terminal and said cathode terminal are electrically coupled to said plurality of leads;
- and
- a housing surrounding said first and second semiconductor devices, said common die pad and a respective portion of each of said plurality of leads.
A converter circuit comprising:
- a semiconductor device including a lead frame having a plurality of leads and a common die pad, a first semiconductor chip having a bottom surface that is secured to said common die pad, said die pad being integral with respective ones of said plurality of leads that extend from an edge of said die pad;
- and including a MOSFET having a source terminal, a drain terminal and a gate terminal, a second semiconductor chip having a bottom surface that is secured to said common die pad and including a Schottky diode having an anode terminal and a cathode terminal, wherein each of said source terminal, said drain terminal, said gate terminal, said anode terminal and said cathode terminal are electrically coupled to said plurality of leads, and a housing surrounding said first and second semiconductor devices, said die pad and a respective portion of each of said plurality of leads;
- a supply voltage terminal electrically coupled to said source terminal of said MOSFET;
- a ground terminal electrically coupled to said anode of said Schottky diode;
- and
- a pair of load terminals, wherein said one of said load terminals is electrically coupled to said drain terminal of said MOSFET and to said cathode of said Schottky diode, and another of said pair of load terminals is electrically coupled to said anode terminal of said Schottky diode.
A synchronous regulator circuit comprising:
- a semiconductor device including a lead frame having a plurality of leads and a common die pad, said die pad being integral with respective ones of said plurality of leads that extend from an edge of said die pad, a first semiconductor chip having a bottom surface that is secured to said common die pad and including a first MOSFET having a source terminal, a drain terminal and a gate terminal, a second semiconductor chip having a bottom surface that is secured to said common die pad and including a Schottky diode having an anode terminal and a cathode terminal, wherein each of said source terminal, said drain terminal, said gate terminal, said anode terminal and said cathode terminal are electrically coupled to said plurality of leads, and a housing surrounding said first and second semiconductor devices, said die pad and a respective portion of each of said plurality of leads;
- a supply voltage terminal;
- a second MOSFET having a drain terminal electrically coupled to said supply voltage terminal, a source terminal electrically coupled to said drain terminal of said first MOSFET and said cathode terminal of said Schottky diode;
- a controller coupled to said gate terminals of said first and second MOSFETs;
- and
- a ground terminal electrically coupled to said source terminal of said first MOSFET and to said anode terminal of said Schottky diode.
Dependencies are inferred from the claim text.