Multi-CPU system's data I/O processor with communication arbitrator performing access operations on I/O connected to a first CPU bus on behalf of a second CPU

A data input-output processor for a multi-CPU system which executes data input-output and computation-related processes by distributing functions among a plurality of CPUs, said data input-output processor comprising:

• A/D conversion means, connected by a bus to a first CPU, for converting an analog input signal to a digital signal;
• communication means, between a second CPU that is distinct from said first CPU and said A/D conversion means, for receiving an A/D conversion demand from said second CPU and converted data from said A/D conversion means and transmitting said converted data to said second CPU;
• and
• communication arbitration means, between said communication means and said first CPU, for arbitrating A/D conversion demands of said first CPU and said second CPU to said A/D conversion means so that said conversion demands do not overlap, said communication arbitration means including a bus switching means for selectively connecting said bus tosaid first CPU and to said communication arbitration means;
• wherein when said first CPU is not accessing said A/D conversion means, said communication arbitration means executes access operations to said A/D conversion means on behalf of said second CPU in accordance with the A/D conversion demand received by said communication means, from said second CPU and sends converted data to said second CPU via said communication means.

A data input-output processor for a multi-CPU system which executes data input-output and computation-related processes by distributing functions among a plurality of CPUs, said data input-output processor comprising:

• data input-output means, connected by a bus to a first CPU, for executing data input-output operations;
• communication means, between a second CPU that is distinct from said first CPU and said data input-output means, for receiving access data of said second CPU and for transmitting said access data to said data input-output means;
• and
• communication arbitration means, between said communication means and said first CPU, for arbitrating access operations of said first CPU and said second CPU to said data input-output means so that said access operations do not overlap;
• wherein said multi-CPU system includes second communication means, between a third CPU, which is distinct from said first CPU and said second CPU, and said data input-output means, and is connected in parallel to said communication means, wherein:
• said communication means sends access data, which includes identification information of said second CPU, from said second CPU to said data input-output means;
• said second communication means sends access data, which includes identification information of said third CPU, from said third CPU to said data input-output means;
• and
• said communication arbitration means is between said communication means, said second communication means and said first CPU to arbitrate access operations of said first CPU, said second CPU and said third CPU to said data input-output means based on said identification information so that said access operations do not overlap.

A data input-output processor for a multi-CPU system which executes data input-output and computation-related processes by distributing functions among a plurality of CPUs, said data input-output processor comprising:

• data input-output means, connected by a bus to a first CPU, for executing data input-output operations;
• communication means, between a second CPU that is distinct from said first CPU and said data input-output means, for receiving access data of said second CPU and for transmitting said access data to said data input-output means;
• and
• communication arbitration means, between said communication means and said first CPU, for arbitrating access operations of said first CPU and said second CPU to said data input-output means so that said access operations do not overlap;
• wherein said multi-CPU system includes third communication means connected in series between a third CPU, which is distinct from said first CPU and said second CPU, and said communication means, wherein:
• said communication means sends and receives said access data, which includes identification information of said second CPU, to said data input-output means from said second CPU;
• said third communication means relays access data, which includes identification information of said third CPU, from said third CPU to said data input-output means and performs transceiving operations between said communication means and said third CPU;
• and
• said communication arbitration means is between said communication means and said first CPU to arbitrate access operations of said first CPU, said second CPU and said third CPU to said data input-output means based on said access information so that said access operations do not overlap.