Apparatus for fibre channel transmission having interface logic, buffer memory, multiplexor/control device, fibre channel controller, gigabit link module, microprocessor, and bus control device

An apparatus for adapting transmissions between an industry standard data bus of a host computer having a host memory and a fibre channel coupled between said host computer and a peripheral storage subsystem having at least one disk drive, said apparatus comprising:

• a. an interface logic having a first input/output terminal coupled to said industry standard bus and a second input/output terminal coupled to a local bus of said apparatus, said interface logic comprising a first set of registers disposed for receiving requests from said host and a second set of registers disposed for receiving instructions from said microprocessor;
• b. a buffer memory having input/output terminals coupled to said local bus;
• c. a multiplexor/control device having a first set of input/output terminals coupled to said local bus and a second set of input/output terminals disposed for transmitting therethrough address and data, said multiplexor/control comprising bi-directional registers and buffers disposed for merging address and data on said local bus before transmission to said fibre channel controller during a write to disk operation, and for separating address and data received from said gigalink module during a read from disk operation;
• d. a fibre channel controller disposed for formatting header and data structures that meet fibre channel protocol, having a first input/output terminal coupled to said second set of input/output terminals of said multiplexor/control device and a second input/output terminal;
• e. a gigabit link module disposed for converting said header and data structures from a parallel format to a serial format and having a first input/output terminal coupled to said second input/output terminal of said fibre channel controller and a second input/output terminal coupled to said fibre channel;
• f. a microprocessor disposed for providing service requests from said host to read and write data from said host memory to and from said peripheral storage subsystem via said buffer memory, said microprocessor having address and data input/output terminals coupled to a processor bus;
• and,
• g. a bus control device coupled between said processor bus and said local bus for providing service requests of said interface logic, said fibre channel controller and said microprocessor and to arbitrate control of said local bus.