At frequency phase shifting circuit for use in a quadrature clock generator

A quadrature clock generator circuit for generating a first output signal and a second output signal that is approximately 90 degrees out of phase with the first output signal, the clock generator circuit comprising:

• a first comparator having a pair of inputs coupled to a pair of complementary input reference signals, the first comparator generating the first output signal in response to the complementary input reference signals;
• a phase shifting circuit coupled to the complementary input reference signals, the phase shifting circuit comprising:
• (i) a first differential amplifier including:
• a pair of field effect transistors configured to form a source coupled pair having a common node, and including a pair of inputs for receiving the complementary input reference signals and a pair of output nodes:
• first and second current sources coupled respectively between the output nodes and a first supply rail, the first and second current sources sourcing a current value of I amperes:
• and
• a third current source coupled between the common node and a second supply rail, the third current source sinking a current value of 2I amperes;
• (ii) a filter circuit coupled across the output nodes, the filter circuit causing the output nodes of the differential amplifier to produce a pair of complementary triangle wave signals in response to the complementary input reference signals:
• and
• (iii) a second comparator having a pair of inputs coupled to receive the pair of complementary triangle wave signals, the second comparator outputting the second output signal in response to a comparison between the pair of complementary triangle wave signals.

A delay-locked loop (DLL) comprising:

• a quadrature clock generator circuit for outputting a first output signal and a second output signal that is approximately 90 degrees out of phase with the first output signal, the clock generator circuit comprising:
• a first comparator having an input coupled to an input reference signal, the first comparator outputting the first output signal in response the input reference signal;
• a phase shifting circuit coupled to the input signal, the phase shifting circuit comprising:
• a triangle wave generator coupled to receive the input reference signal, the triangle wave generator including a pair of complementary outputs that output a pair of complementary triangle wave signals in response to the input reference signal;
• and
• a second comparator having a pair of inputs coupled to receive the pair of complementary triangle wave signals, the comparator outputting the second output signal in response to a comparison between the pair of complementary triangle wave signals;
• a variable delay circuit coupled to receive the first and second output signals, the variable delay circuit outputting a delayed signal in response to a control signal;
• a clock buffer circuit coupled to receive and buffer the delayed circuit, the clock buffer circuit outputting an output signal of the DLL;
• and
• a phase detector coupled to the input reference signal and the output signal of the DLL, the phase comparator generating the control signal in response to a comparison between the input and output signals.

A phase shifting circuit comprising:

• (a) a current switch coupled to receive a pair of complementary input reference signals and including a pair of complementary outputs, the current switch for coupling to a power supply rail the current switch providing an output current having a direction of flow from one of the complementary outputs to the other of the complementary outputs, wherein the current switch reverses the direction of flow for the output current in response to the pair of complementary input reference signals;
• (b) a filter coupled across the complementary outputs and integrating the output current to generate a pair of complementary triangle wave signals, the filter comprising:
• (i) a first resistor having a first terminal coupled to one of the complementary outputs and a second terminal coupled to a common mode voltage;
• the common mode voltage being different than the power supply rail;
• (ii) a second resistor having a first terminal coupled to the other complementary output and a second terminal coupled to the common mode voltage;
• and
• (iii) capacitive means for providing a capacitance across the complementary outputs;
• and
• (c) a comparator having a pair of inputs coupled to receive the pair of complementary triangle wave signals, the comparator generating an output signal having a predetermined phase relationship with the input reference signal in response to a comparison between the pair of complementary triangle wave signals.

A quadrature clock generator for generating a first output signal and a second output signal that is approximately 90 degrees out of phase with the first output signal, the clock generator circuit comprising:

• (a) a first comparator having a pair of inputs coupled to a pair of complementary input reference signals, the first comparator generating the first output signal in response to the complementary input reference signals;
• (b) a phase shifting circuit coupled to the complementary input reference signals, the phase shifting circuit comprising:
• (i) a current switch coupled to receive the pair of complementary input reference signals and including a pair of complementary outputs, the current switch for coupling to a power supply rail the current switch providing an output current having a direction of flow from one of the complementary outputs to the other of the complementary outputs, wherein the current switch reverses the direction of flow for the output current in response to the pair of complementary input reference signals;
• (ii) a filter coupled across the complementary outputs and integrating the output current to generate a pair of complementary triangle wave signals, the filter comprising:
• (1) a first resistor having a first terminal coupled to one of the complementary outputs and a second terminal coupled to a common mode voltage;
• the common mode voltage being different than the power supply rail;
• (2) a second resistor having a first terminal coupled to the other complementary output and a second terminal coupled to the common mode voltage;
• and
• (3) capacitive means for providing a capacitance across the complementary outputs;
• and
• (iii) a second comparator having a pair of inputs coupled to receive the pair of complementary triangle wave signals, the comparator generating the second output signal in response to a comparison between the pair of complementary triangle wave signals.