Microbump interconnect for bore semiconductor dice
AssigneeMicron Technology, Inc.
InventorSalman Akram
Life of this patent
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Abstract
A method for forming an interconnect for making a temporary or permanent electrical connection to a semiconductor dice is provided. The method includes forming a substrate with an insulating layer and a pattern of conductors thereon. The conductors are formed as a bi-metal stack including a barrier layer formed of an inert metal and a conductive layer formed of a highly conductive metal. Microbumps are formed on the conductors by deposition through a mask using an electroplating, electroless plating, screen printing or evaporation process. The interconnect can be used to provide a temporary electrical connection for testing bare semiconductor dice. Alternately the interconnect can be used for flip chip mounting dice for fabricating multi chip modules and other electronic devices.
Claims18
An interconnect for making electrical connections with a semiconductor die comprising:
- a substrate;
- a compliant layer on the substrate, the compliant layer comprising a polymeric material;
- a plurality of conductors on the compliant layer;
- and
- a plurality of microbumps on the conductors having a pattern matching pads on the die, each microbump comprising a first portion bonded to a conductor and a convex tip portion configured to electrically contact a pad on the die, with the conductors and microbumps configured to flex with the compliant layer to accommodate dimensional variations in the microbumps or the pads.
The interconnect of claim 31 wherein each microbump comprises solder and includes a solder wettable contact on the conductor.
An interconnect for making electrical connections with a semiconductor die comprising:
- a substrate;
- a polyimide compliant layer on the substrate;
- a plurality of conductors on the compliant layer;
- and
- a plurality of microbumps on the conductors in a pattern matching pads on the die, each microbump including a first portion attached to a conductor and a second portion configured to electrically contact a pad on the die, with the microbumps and the conductors configured to flex with the compliant layer to accommodate dimensional variations in the microbumps or pads.
A multi chip module comprising:
- a substrate;
- a polymeric compliant layer on the substrate;
- a pattern of conductors on the compliant layer;
- a plurality of microbumps bonded to the conductors in a first pattern;
- at least one semiconductor die flip chip mounted to the substrate, the die including a plurality of pads formed in a second pattern matching the first pattern, with each pad in electrical communication with a microbump, and with the microbumps and conductors configured to flex with the compliant layer to accommodate dimensional variations in the microbumps or pads.
A test assembly for a semiconductor die comprising:
- a base;
- an interconnect mounted to the base and comprising:
- a substrate;
- a polymeric compliant layer on the substrate;
- a plurality of conductors on the compliant layer;
- and
- a plurality of microbumps on the conductors having a first pattern matching a second pattern of pads on the die, each microbump including a first portion bonded to a conductor, and a second portion configured to electrically contact a pad on the die, the microbumps configured to flex with the conductors and with the compliant layer, to accommodate dimensional variations in the microbumps or the pads.
Dependencies are inferred from the claim text.