Avoid photoresist lifting by post-oxide-dep plasma treatment

A method for making an electrical contact in the fabrication of an integrated circuit device comprising:

• providing semiconductor device structures in and on a semiconductor substrate;
• depositing a silicon oxide layer over said semiconductor device structures wherein said depositing is performed in a deposition chamber;
• treating said silicon oxide layer with a plasma treatment selected from the group containing N.sub.2 O, N.sub.2, and Ar while said substrate is still within said deposition chamber;
• removing said substrate from said deposition chamber;
• forming a photoresist mask over said silicon oxide layer with an opening above said semiconductor device structures to be electrically contacted wherein said plasma treatment improves adhesion of said photoresist mask to said silicon oxide layer when compared to a conventional integrated circuit device;
• etching a contact opening through said silicon oxide layer not covered by said mask to said semiconductor device structures to be electrically contacted;
• and
• depositing a conducting material within said contact opening completing said electrical contact in the fabrication of said integrated circuit device.

A method for making an electrical contact in the fabrication of an integrated circuit device wherein photoresist adhesion is improved in the inventive integrated circuit device when compared to photoresist adhesion in a conventional integrated circuit device comprising:

• providing semiconductor device structures in and on a semiconductor substrate;
• depositing a silicon oxide dielectric layer over said semiconductor device structures wherein said depositing is performed in a deposition chamber;
• treating said dielectric layer with a plasma treatment whereby the surface of said dielectric layer is roughened wherein said plasma comprises one of the group containing N.sub.2 O, N.sub.2, and Ar while said substrate is still within said deposition chamber;
• removing said substrate from said deposition chamber;
• forming a photoresist mask over said dielectric layer with an opening above said semiconductor device structures to be electrically contacted wherein said roughened surface of said dielectric layer allows for better photoresist adhesion of said photoresist mask to said dielectric layer when compared to said photoresist adhesion in said conventional integrated circuit device;
• etching a contact opening through said dielectric layer not covered by said mask to said semiconductor device structures to be electrically contacted;
• and
• depositing a conducting material within said contact opening completing said electrical contact in the fabrication of said integrated circuit device.