Arithmetic cell for field programmable devices
AssigneeHewlett-Packard Company
InventorFrederick A. Perner
Life of this patent
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Abstract
An arithmetic cell to be used in field programmable devices is defined in this invention. This cell will allow efficient implementations of multipliers, multipliers/accumulators and adders (addition, compare, and subtraction) in one compact cell that is a collection of circuits common to field programmable devices. This cell may be used in a flexible manner that allows full multipliers of any dimension (n*m products), adders of any length (n+m sums, compare, differences), accumulators, and registers (to hold complete results or partial products). Key elements in this invention are an application controlled multiplexer, signal routing to provide a shift function for multiplication, and a minimum collection of configuration bits and circuit elements to perform the basic arithmetic functions.
Claims19
An arithmetic cell for a programmable device, the cell comprising:
- an adder;
- a first multiplexer;
- a second multiplexer;
- and
- a steering logic configurable to perform a multiplication operation,
- wherein the first and second multiplexers cooperate to perform a test on an active bit of a multiplier input to the adder, and if the active bit of the multiplier is a "1", a multiplicand input to the adder is added to a partial product and the resultant partial product is then shifted,
- however, if the active bit of the multiplier is a "0", the resultant partial product is shifted without adding.
A method of performing multiplication within an arithmetic cell for a programmable device, the arithmetic cell including an adder, first and second multiplexers and a configurable steering logic, the method comprising the steps of:
- configuring the steering logic to perform the multiplication operation;
- and
- using the first and second multiplexers to cooperatively perform a test on an active bit of a multiplier input to the adder;
- if the active bit of the multiplier is a "1", a multiplicand input to the adder is added to a partial product and the resultant partial product is then shifted;
- however, if the active bit of the multiplier is a "0", the resultant partial product is shifted without adding.
A programmable device, the programmable device comprising an array of cells wherein at least one of the cells is an arithmetic cell having:
- an adder;
- a first multiplexer;
- a second multiplexer;
- and
- a steering logic configurable to perform a multiplication operation,
- wherein the first and second multiplexers cooperate to perform a test on an active bit of a multiplier input to the adder, and if the active bit of the multiplier is a "1", a multiplicand input to the adder is added to a partial product and the resultant partial product is then shifted,
- however, if the active bit of the multiplier is a "0", the resultant partial product is shifted without adding.
Dependencies are inferred from the claim text.