Method of forming an interband lateral resonant tunneling transistor
AssigneeThe United States of America as represented by the Secretary of the Navy
InventorsJerry R. Meyer, Craig A. Hoffman, Filbert J. Bartoli, Jr.
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Abstract
This invention describes a nanometer scale interband lateral resonant tunneling transistor, and the method for producing the same, with lateral geometry, good fanout properties and suitable for incorporation into large-scale integrated circuits. The transistor is of a single gate design and operation is based on resonant tunneling processes in narrow-gap nanostructures which are highly responsive to quantum phenomena. Such quantum-effect devices can have very high density, operate at much higher temperatures and are capable of driving other devices.
Claims7
A method for making a tunneling transistor consisting of the following steps:
- depositing a material forming an insulating buffer layer of material on a substrate to ease a mismatch between said substrate and succeeding layers of material;
- depositing a layer of material forming a doping region on the insulating buffer layer;
- depositing a layer of material forming an undoped barrier on the doping region;
- depositing a material forming a single quantum well layer containing both electron states and the hole states on the undoped barrier;
- depositing an insulating layer of material on said single quantum well layer of material;
- and
- depositing a single electrode of a width small enough to induce quantized energy subband levels with energy separators greater than the thermal energy kBT, where T is BOOK, due to lateral confinement induced by the electrode, said electrode disposed on said insulating layer forming a gate controlling a flow of electrons so as to cause interband lateral resonant tunneling in said single quantum well layer of material under said electrode when a voltage is applied to said electrode.
Dependencies are inferred from the claim text.