Configurable drive clock

A configurable drive clock generator for selectably establishing hold time for signals output from a processing device operating at an internal clock speed, to external devices operating at an external clock speed, the configurable drive clock generator comprising:

• a clock multiplier, connected to an external clock signal, for multiplying said external clock signal by a predetermined amount, and for producing an internal clock signal;
• a ring oscillator, connected to said internal clock signal, for providing a plurality of output signals, said plurality of output signals having the same frequency as said internal clock signal, but differing in phase from each other, and from said internal clock signal;
• and
• selection logic, connected to said plurality of output signals, for selecting one of said plurality of output signals to be a drive clock signal;
• wherein said drive clock signal establishes said hold time for signals output from the processing device to the external devices.

A method for controlling the hold time of signals output from a processing system by a bus unit to external devices, wherein the processing system operates at an internal clock speed which may be varied, and the external devices operate at an external clock speed, the method comprising the steps of:

• providing a plurality of differing phase delay clocks, each of the delay clocks having the same frequency as the internal clock speed which may be varied;
• determining which one of the plurality of differing phase delay clocks will provide the desired hold time for the signals output by the bus unit;
• and
• selecting the one of the plurality of differing phase delay clocks to be provided to said bus unit as a drive clock.