Single chip universal protocol multi-function ATM network interface

An Asynchronous Transfer Mode (ATM) network termination device, comprising:

• a single chip having mounted thereon:
• an asynchronous transfer mode (ATM) network;
• a universal protocol device comprising a virtual channel memory for storing ATM cells, and a processor connected to the virtual channel memory for segmenting and reassembling said ATM cells stored in the virtual channel memory;
• a network interface connected to the virtual channel memory, the processor and an ATM network for transferring ATM cells including segmented Conversion Sublayer Payload Data Units (CS-PDUs) between the memory, the processor and the ATM network, each CS-PDU including actual data to be transmitted, a header and a trailer;
• and
• a host interface connected to the virtual channel memory, the processor and the host unit for transferring unsegmented CS-PDUs between the virtual channel memory, the processor and a host unit;
• wherein said universal protocol device is integrated with:
• an adaptive error detection and correction apparatus for an asynchronous transfer mode (ATM) network device;
• a random number generating apparatus for an interface unit of a carrier sense with multiple access and collision detect (CSMA/CD) Ethernet data network;
• a router for a multiplex communication network;
• and
• a hub for an electronic communication network.

An asynchronous transfer mode (ATM) termination device, comprising:

• a substrate;
• a single chip ATM processing interconnection unit including a universal protocol device disposed on said substrate for controlling ATM line operations in response to a plurality of ATM adaption layers including data streams of cells;
• said universal protocol device including:
• random access volatile memory means for storing and retrieving individual ones of the cells in said data stream of cells to help facilitate the segmentation and reassembly of said data stream cells to effect high speed transmission of divergent types of data over an ATM network;
• direct memory access controller means for coupling said memory means to said ATM network;
• processor means coupled to said memory means and said direct memory access controller means for initiating controller means operations to help facilitate the ATM line operations and effect asynchronous data transfers between said ATM network and a host unit through said memory means;
• and
• operating program means coupled to said processor means for controlling said processor means to accommodate different types of ATM network protocols;
• said operating program means enabling said processor means and said controller means to cooperate to effect at least the segmentation and reassembly of said plurality of ATM adaption layers for high speed transmission of divergent types of data over said ATM network
• wherein said universal protocol device is integrated with:
• an adaptive error detection and correction apparatus for an asynchronous transfer mode (ATM) network device;
• a random number generating apparatus for an interface unit of a carrier sense with multiple access and collision detect (CSMA/CD) Ethernet data network;
• a router for a multiplex communication network;
• and
• a hub for an electronic communication network.

An information processing system interconnection device for facilitating high speed transmission of divergent types of data between an electronic data network and a host unit, the data network transferring data in the form of cells, comprising:

• a substrate;
• a network interface formed on said substrate for facilitating the transferring of cells in a data network protocol to and from the data network;
• a host interface formed on said substrate for facilitating the transferring of cells in a host protocol to and from the host unit;
• and
• a universal protocol device formed on said substrate for coupling said network interface and said host interface together to facilitate the high speed transmission of divergent types of data therebetween,
• wherein said universal protocol device is integrated with:
• an adaptive error detection and correction apparatus for an asynchronous transfer mode (ATM) network device;
• a random number generating apparatus for an interface unit of a carrier sense with multiple access and collision detect (CSMA/CD) Ethernet data network;
• a router for a multiplex communication network;
• and
• a hub for an electronic communication network.