Flash memory with microcrystalline silicon carbide film floating gate
AssigneeMicron Technology, Inc.
InventorLeonard Forbes
Life of this patent
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Abstract
A memory is described which has memory cells that store data using hot electron injection. The data is erased through electron tunneling. The memory cells are described as floating gate transistors wherein the floating gate is fabricated using a conductive layer of microcrystalline silicon carbide particles. The microcrystalline silicon carbide particles are in contact such that a charge stored on the floating gate is shared between the particles. The floating gate has a reduced electron affinity to allow for data erase operations using lower voltages.
Claims10
An integrated circuit memory cell comprising:
- a transistor having a source, drain, control gate and a floating gate, the floating gate comprising a film of microcrystalline silicon carbide particles, the microcrystalline silicon carbide particles being in contact to form a conductive film.
An integrated circuit memory cell comprising:
- a transistor having a source, drain, control gate and a floating gate, the floating gate comprising a conductive film of microcrystalline silicon carbide particles.
An integrated circuit field effect transistor comprising:
- a source region;
- a drain region;
- a conductive channel separating the source and drain regions;
- a floating gate comprising a conductive film of microcrystalline silicon carbide particles, the floating gate located adjacent the channel and separated therefrom by a first insulating layer;
- and
- a control gate located adjacent the floating gate and separated therefrom by a second insulating layer.
A memory device comprising:
- an array of memory cells, each of the memory cells comprising:
- a source region,
- a drain region coupled to a bit line,
- a conductive channel separating the source and drain regions,
- a floating gate comprising a conductive film of microcrystalline silicon carbide particles, the floating gate located adjacent the channel and separated therefrom by a first insulating layer, and
- a control gate located adjacent the floating gate and separated therefrom by a second insulating layer, the control gate is coupled to a word line;
- addressing circuitry for addressing the array of memory cells;
- and
- control circuitry for controlling read and write operations of the memory device.
A method of storing data in a flash memory device having an array of memory cells addressable by word and bit lines, comprising the steps of:
- increasing a voltage applied to a control gate of a memory cell, the memory cell including a floating gate comprising a conductive film of microcrystalline silicon carbide particles;
- and
- trapping electrons on the floating gate by hot electron injection.
Dependencies are inferred from the claim text.